Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 16 Jun 2004 18:18:01 +0800
From:      Erich Dollansky <oceanare@pacific.net.sg>
To:        Martin Nilsson <martin@gneto.com>
Cc:        current@freebsd.org
Subject:   Re: How to determine the L2 cache size on non-AMD CPUs (automatic page queue color tuning)?
Message-ID:  <40D01E59.8000404@pacific.net.sg>
In-Reply-To: <40D016F2.2080904@gneto.com>
References:  <20040616112758.46677e25@Magellan.Leidinger.net> <40D016F2.2080904@gneto.com>

next in thread | previous in thread | raw e-mail | index | archive | help
Hi,

Martin Nilsson wrote:
> Alexander Leidinger wrote:
> 
> How much effct on performance does a wrong cache size value have?
> 
The effect depends very much on the application and its ability to use 
the CPU cache. I did some benchmarks to get a feeling for it on Athlon 
MPs some time ago. The improvement in speed was up to factor 30 under 
high CPU load for very data intense operations. Applications even could 
become slower if the CPU cache holds the data anyway. The reason is the 
additional effort to prefetch data which is already chached.

It is not this easy to use always the right strategy to get the right 
data into the cache.

Erich



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?40D01E59.8000404>