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Date:      Sat, 23 Aug 2003 22:17:49 -0700 (PDT)
From:      Marcel Moolenaar <marcel@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 36820 for review
Message-ID:  <200308240517.h7O5Hn5U099837@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=36820

Change 36820 by marcel@marcel_nfs on 2003/08/23 22:17:37

	The previous commit was premature. Resetting the FIFOs to flush
	them has some nasty side-effects. We ended up with a receive
	interrupt that probably triggered another flush or something
	like that. Your regular chain reaction. Circumvent it by not
	masking the receive byte count and correct it when it's 0.
	I'm not entirely happy with this. It's too fragile. At least
	it makes the driver usable.
	
	While here, specify the interrupts we want instead of the ones
	we don't want.

Affected files ...

.. //depot/projects/uart/dev/uart/uart_dev_sab82532.c#15 edit

Differences ...

==== //depot/projects/uart/dev/uart/uart_dev_sab82532.c#15 (text+ko) ====

@@ -246,7 +246,6 @@
 	uart_barrier(bas);
 
 	sab82532_param(bas, baudrate, databits, stopbits, parity);
-	sab82532_flush(bas, UART_FLUSH_TRANSMITTER|UART_FLUSH_RECEIVER);
 
 	/* Clear interrupts. */
 	uart_setreg(bas, SAB_IMR0, 0xff);
@@ -256,6 +255,8 @@
 	uart_getreg(bas, SAB_ISR1);
 	uart_barrier(bas);
 
+	sab82532_flush(bas, UART_FLUSH_TRANSMITTER|UART_FLUSH_RECEIVER);
+
 	/* Power up. */
 	uart_setreg(bas, SAB_CCR0, ccr0|SAB_CCR0_PU);
 	uart_barrier(bas);
@@ -379,6 +380,7 @@
 sab82532_bus_attach(struct uart_softc *sc)
 {
 	struct uart_bas *bas;
+	uint8_t imr0, imr1;
 
 	bas = &sc->sc_bas;
 	if (!sc->sc_console && !sc->sc_dbgport)
@@ -387,9 +389,11 @@
 	sc->sc_rxfifosz = 32;
 	sc->sc_txfifosz = 32;
 
-	uart_setreg(bas, SAB_IMR0, SAB_IMR0_PERR|SAB_IMR0_FERR|SAB_IMR0_PLLA);
-	uart_setreg(bas, SAB_IMR1, SAB_IMR1_BRK|SAB_IMR1_XDU|SAB_IMR1_TIN|
-	    SAB_IMR1_XMR|SAB_IMR1_XPR);
+	imr0 = SAB_IMR0_TCD|SAB_IMR0_TIME|SAB_IMR0_CDSC|SAB_IMR0_RFO|
+	    SAB_IMR0_RPF;
+	uart_setreg(bas, SAB_IMR0, 0xff & ~imr0);
+	imr1 = SAB_IMR1_BRKT|SAB_IMR1_ALLS|SAB_IMR1_CSC;
+	uart_setreg(bas, SAB_IMR1, 0xff & ~imr1);
 	uart_barrier(bas);
 	return (0);
 }
@@ -514,15 +518,10 @@
 {
 	struct uart_bas *bas;
 	int count, xc;
-	uint8_t s, star;
+	uint8_t s;
 
 	bas = &sc->sc_bas;
-	star = uart_getreg(bas, SAB_STAR);
-	if (!(star & SAB_STAR_RFNE))
-		return (0);
-	count = uart_getreg(bas, SAB_RBCL) & 31;
-	if (count == 0)
-		count = 32;
+	count = uart_getreg(bas, SAB_RBCL);
 	while (count && !uart_rx_full(sc)) {
 		xc = uart_getreg(bas, SAB_RFIFO);
 		s = uart_getreg(bas, SAB_RFIFO);



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