Date: Wed, 16 Jun 2004 18:57:57 +0200 From: Alexander Leidinger <Alexander@Leidinger.net> To: John Polstra <jdp@polstra.com> Cc: Radek Kozlowski <radek@raadradd.com> Subject: Re: How to determine the L2 cache size on non-AMD CPUs (automatic page queue color tuning)? Message-ID: <20040616185757.4b19ea3e@Magellan.Leidinger.net> In-Reply-To: <XFMail.20040616093540.jdp@polstra.com> References: <40D07430.1070504@raadradd.com> <XFMail.20040616093540.jdp@polstra.com>
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On Wed, 16 Jun 2004 09:35:40 -0700 (PDT) John Polstra <jdp@polstra.com> wrote: > On 16-Jun-2004 Radek Kozlowski wrote: > > The latest version of cpuid is from 2002 and at least for my Athlon XP-M > > processor it doesn't read the information about L2 cache correctly. > > IIRC, for my L2 size it only takes one byte from the beginning of ecx > > register, whereas in my case it is stored in two, a.s.o. So I wouldn't > > rely on cpuid when it comes to newer CPUs. If bootverbose prints the cache size correctly (at least on -current), I already have code which does the right thing for your AMD CPU. > Yes, but it gives working code that generally shows how to get the > information. Here's a link to an Intel document "Intel(R) Processor > Idientification and the CPUID Instruction" that covers the newer CPUs: > > http://www.intel.com/design/Xeon/applnots/24161825.pdf I will have a look at both (the cpuid port and the PDF). Thanks, Alexander. -- I'm available to get hired (preferred in .lu). http://www.Leidinger.net Alexander @ Leidinger.net GPG fingerprint = C518 BC70 E67F 143F BE91 3365 79E2 9C60 B006 3FE7
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