Date: Thu, 02 May 2013 09:21:51 -0600 From: Ian Lepore <ian@FreeBSD.org> To: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> Cc: freebsd-arm@FreeBSD.org Subject: Re: vm fault on OpenRD [was: Re: Allwinner A13: Fatal kernel mode data abort: 'Translation Fault (S)'] Message-ID: <1367508111.1180.112.camel@revolution.hippie.lan> In-Reply-To: <5181AC1A.2020400@embtoolkit.org> References: <63837.85.229.93.125.1367417396.squirrel@alvermark.net> <5181AC1A.2020400@embtoolkit.org>
next in thread | previous in thread | raw e-mail | index | archive | help
--=-ebWqrFW/G1F17ZAePZ+W
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
On Thu, 2013-05-02 at 01:58 +0200, Abdoulaye Walsimou Gaye wrote:
> On 05/01/2013 04:09 PM, Jakob Alvermark wrote:
> > [...]
> >
>
> Hello,
> I have similar boot error while trying to boot my openrd-base, with a KERNCONF based on DB-88F6XXX (see attached files)
>
> ## Starting application at 0x00900000 ...
> dtbp = 0xc0c9a8f8
> KDB: debugger backends: ddb
> KDB: current backend: ddb
> Copyright (c) 1992-2013 The FreeBSD Project.
> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
> The Regents of the University of California. All rights reserved.
> FreeBSD is a registered trademark of The FreeBSD Foundation.
> FreeBSD 9.1-STABLE #1 r+aed5102-dirty: Thu May 2 01:50:19 CEST 2013
> walsimou@vbox-fbsd64:/home/walsimou/embtk-fbsd/obj/arm.arm/usr/home/walsimou/freebsd.git/sys/OPENRD-BASE arm
> gcc version 4.2.1 20070831 patched [FreeBSD]
> WARNING: DIAGNOSTIC option enabled, expect reduced performance.
> module mvs already present!
> CPU: Feroceon 88FR131 rev 1 (Marvell core)
> DC enabled IC enabled WB enabled EABT branch prediction enabled
> 16KB/32B 4-way Instruction cache
> 16KB/32B 4-way write-back-locking-C Data cache
> real memory = 536870912 (512 MB)
> avail memory = 519278592 (495 MB)
> SOC: Marvell 88F6281 rev A0, TClock 200MHz
> simplebus0: <Flattened device tree simple bus> on fdtbus0
> ic0: <Marvell Integrated Interrupt Controller> mem 0xf1020200-0xf102023b on simplebus0
> timer0: <Marvell CPU Timer> mem 0xf1020300-0xf102032f irq 1 on simplebus0
> Event timer "CPUTimer0" frequency 200000000 Hz quality 1000
> Timecounter "CPUTimer1" frequency 200000000 Hz quality 1000
> gpio0: <Marvell Integrated GPIO Controller> mem 0xf1010100-0xf101011f irq 35,36,37,38,39,40,41 on simplebus0
> rtc0: <Marvell Integrated RTC> mem 0xf1010300-0xf1010307 on simplebus0
> twsi0: <Marvell Integrated I2C Bus Controller> mem 0xf1011000-0xf101101f irq 43 on simplebus0
> iicbus0: <Philips I2C bus> on twsi0
> iic0: <I2C generic I/O> on iicbus0
> mge0: <Marvell Gigabit Ethernet controller> mem 0xf1072000-0xf1073fff irq 12,13,14,11,46 on simplebus0
> mge0: Ethernet address: 00:50:43:01:a1:32
> miibus0: <MII bus> on mge0
> e1000phy0: <Marvell 88E1116R Gigabit PHY> PHY 8 on miibus0
> e1000phy0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
> uart0: <16550 or compatible> mem 0xf1012000-0xf101201f irq 33 on simplebus0
> uart0: console (114678,n,8,1)
> uart1: <16550 or compatible> mem 0xf1012100-0xf101211f irq 34 on simplebus0
> cesa0: <Marvell Cryptographic Engine and Security Accelerator> mem 0xf1030000-0xf103ffff irq 22 on simplebus0
> ehci0: <Marvell Integrated USB 2.0 controller> mem 0xf1050000-0xf1050fff irq 48,19 on simplebus0
> usbus0: EHCI version 1.0
> usbus0: stop timeout
> usbus0: set host controller mode
>
> vm_fault(0xc0cc6674, 0, 1, 0) -> 1
> Fatal kernel mode data abort: 'Translation Fault (S)'
> trapframe: 0xc0cfab68
> FSR=00000005, FAR=00000010, spsr=200000d3
> r0 =c36605c0, r1 =c0cc6390, r2 =600000d3, r3 =00000000
> r4 =c0a4e65c, r5 =80000003, r6 =c36640d0, r7 =c0c12278
> r8 =ffffffff, r9 =c350f280, r10=c3664080, r11=c0cfabf0
> r12=c0cc8aa0, ssp=c0cfabb4, slr=c0c26698, pc =c0a50964
>
> [ thread pid 0 tid 100000 ]
> Stopped at
While the error messages are similar, it appears that the cause is
completely different. Given that it appears to have crashed while
initializing USB, I can think of two things to try...
Add USB_HOST_ALIGN=32 to your kernel config file. This is required for
all armv4 and armv5 platforms, but isn't in most of our stock config
files right now.
Also, try the attached patch. It avoids unconditionally enabling the
cache "allocate on write" feature in the hardware, and instead leaves it
in whatever state the bootloader set it to (on the assumption that the
vendor-supplied bootloader knows best about when this feature is
problematic; I think it may depend somewhat on how the board is
designed).
-- Ian
--=-ebWqrFW/G1F17ZAePZ+W
Content-Disposition: inline; filename="marvell_no_wralloc.diff"
Content-Type: text/x-patch; name="marvell_no_wralloc.diff"; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Index: sys/arm/arm/cpufunc.c
===================================================================
--- sys/arm/arm/cpufunc.c (revision 243412)
+++ sys/arm/arm/cpufunc.c (working copy)
@@ -1067,13 +1067,13 @@ set_cpufuncs()
*/
if (cputype == CPU_ID_MV88FR571_VD ||
cputype == CPU_ID_MV88FR571_41) {
- sheeva_control_ext(0xffffffff,
- FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN |
+ sheeva_control_ext(0xffffffff & ~FC_WR_ALLOC_EN,
+ FC_DCACHE_STREAM_EN |
FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN |
FC_L2_PREF_DIS);
} else {
- sheeva_control_ext(0xffffffff,
- FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN |
+ sheeva_control_ext(0xffffffff & ~FC_WR_ALLOC_EN,
+ FC_DCACHE_STREAM_EN |
FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN);
}
--=-ebWqrFW/G1F17ZAePZ+W--
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?1367508111.1180.112.camel>