Date: Fri, 15 Dec 2000 13:20:26 -0800 (PST) From: Matthew Jacob <mjacob@feral.com> To: Bernd Walter <ticso@cicely5.cicely.de> Cc: alpha@FreeBSD.org, Andrew Gallatin <gallatin@cs.duke.edu>, =?iso-8859-1?Q?G=E9rard_Roudier?= <groudier@club-internet.fr> Subject: Re: mutex/ithread jitters? Message-ID: <Pine.LNX.4.21.0012151320040.29573-100000@zeppo.feral.com> In-Reply-To: <XFMail.001215131924.jhb@FreeBSD.org>
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> > But I can't see where writing to hardware is enshured - are the registers > > marked non-cacheable - but then why an mb? > > I asume 4100 is tsunami based as I can't find any reference in > > alpha/dec_kn300.c for defining of platform.intr_disable/enable. No, it's not tsunami based. See mcbus. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-alpha" in the body of the message
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