Date: Sun, 12 May 1996 16:42:23 -0400 (EDT) From: "matthew c. mead" <mmead@Glock.COM> To: hackers@freebsd.org Subject: Triton chipset with 256k cache caches 32M only? Message-ID: <199605122042.QAA01594@neon.Glock.COM>
next in thread | raw e-mail | index | archive | help
I've got two machine with moderately fast CPUs in them. One is a Cyrix 6x86 120+ (@100Mhz), and the other is a P90 (clocked to 100Mhz). When I have 40M in the machines, the upper 8M is not cached, and my performance is roughly 2/3 of that when they just have 32M and all of the memory is cached. Does anyone know for sure whether or not 256K cache Triton chipsets only cache up to 32M? Anyone know what I can do to get the other 8M cached as well? I'd really like to have that extra 8M in there, but at 2/3 the performance, it aint gonna happen. Any help is greatly appreciated! -matt -- Matthew C. Mead mmead@Glock.COM http://www.Glock.COM/~mmead/
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199605122042.QAA01594>