Date: Sat, 20 Dec 2014 19:47:52 +0000 (UTC) From: Neel Natu <neel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r275965 - head/sys/amd64/vmm/intel Message-ID: <201412201947.sBKJlqTI016788@svn.freebsd.org>
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Author: neel Date: Sat Dec 20 19:47:51 2014 New Revision: 275965 URL: https://svnweb.freebsd.org/changeset/base/275965 Log: Emulate writes to the IA32_MISC_ENABLE MSR. PR: 196093 Reported by: db Tested by: db Discussed with: grehan MFC after: 1 week Modified: head/sys/amd64/vmm/intel/vmx_msr.c Modified: head/sys/amd64/vmm/intel/vmx_msr.c ============================================================================== --- head/sys/amd64/vmm/intel/vmx_msr.c Sat Dec 20 19:41:31 2014 (r275964) +++ head/sys/amd64/vmm/intel/vmx_msr.c Sat Dec 20 19:47:51 2014 (r275965) @@ -376,9 +376,31 @@ vmx_rdmsr(struct vmx *vmx, int vcpuid, u int vmx_wrmsr(struct vmx *vmx, int vcpuid, u_int num, uint64_t val, bool *retu) { - int error = 0; - + uint64_t changed; + int error; + + error = 0; switch (num) { + case MSR_IA32_MISC_ENABLE: + changed = val ^ misc_enable; + /* + * If the host has disabled the NX feature then the guest + * also cannot use it. However, a Linux guest will try to + * enable the NX feature by writing to the MISC_ENABLE MSR. + * + * This can be safely ignored because the memory management + * code looks at CPUID.80000001H:EDX.NX to check if the + * functionality is actually enabled. + */ + changed &= ~(1UL << 34); + + /* + * Punt to userspace if any other bits are being modified. + */ + if (changed) + error = EINVAL; + + break; default: error = EINVAL; break;
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