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Date:      Sun, 26 Jul 2009 03:20:12 +0000 (UTC)
From:      Nathan Whitehorn <nwhitehorn@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-projects@freebsd.org
Subject:   svn commit: r195881 - in projects/ppc64/sys: conf powerpc/aim powerpc/aim64 powerpc/include powerpc/powermac powerpc/powerpc
Message-ID:  <200907260320.n6Q3KC4o058528@svn.freebsd.org>

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Author: nwhitehorn
Date: Sun Jul 26 03:20:12 2009
New Revision: 195881
URL: http://svn.freebsd.org/changeset/base/195881

Log:
  Checkpoint current status: everything currently compiles except
  aim/copyinout.c, powerpc/elf_machdep.c, and powerpc/in_cksum.c. Hopefully,
  I will see some hello world boot messages soon.
  
  Changes are:
  
  - Create a new powerpc/aim64 directory to hold a small number of
    aim64-specific files. Depending on whether we need to have a
    sys/powerpc64 in the end, this could be moved there.
  - Move aim/mmu_oea64.c to aim64
  - Pacify the compiler about changed types, update trap_subr.S, etc.
  - Remove device options for devices that don't exist on any PPC64
    machines.

Added:
  projects/ppc64/sys/powerpc/aim64/
  projects/ppc64/sys/powerpc/aim64/locore.S
     - copied unchanged from r195651, projects/ppc64/sys/powerpc/aim/locore.S
  projects/ppc64/sys/powerpc/aim64/machdep.c
     - copied, changed from r195651, projects/ppc64/sys/powerpc/aim/machdep.c
  projects/ppc64/sys/powerpc/aim64/mmu_oea64.c
     - copied, changed from r195651, projects/ppc64/sys/powerpc/aim/mmu_oea64.c
  projects/ppc64/sys/powerpc/aim64/swtch.S
     - copied unchanged from r195651, projects/ppc64/sys/powerpc/aim/swtch.S
  projects/ppc64/sys/powerpc/aim64/trap_subr.S
     - copied, changed from r195651, projects/ppc64/sys/powerpc/aim/trap_subr.S
Deleted:
  projects/ppc64/sys/powerpc/aim/mmu_oea64.c
Modified:
  projects/ppc64/sys/conf/Makefile.powerpc64
  projects/ppc64/sys/conf/files.powerpc
  projects/ppc64/sys/conf/files.powerpc64
  projects/ppc64/sys/conf/ldscript.powerpc64
  projects/ppc64/sys/powerpc/include/spr.h
  projects/ppc64/sys/powerpc/powermac/cpcht.c
  projects/ppc64/sys/powerpc/powermac/uninorth.c
  projects/ppc64/sys/powerpc/powerpc/bcopy.c
  projects/ppc64/sys/powerpc/powerpc/cpu.c
  projects/ppc64/sys/powerpc/powerpc/db_interface.c
  projects/ppc64/sys/powerpc/powerpc/db_trace.c
  projects/ppc64/sys/powerpc/powerpc/syncicache.c

Modified: projects/ppc64/sys/conf/Makefile.powerpc64
==============================================================================
--- projects/ppc64/sys/conf/Makefile.powerpc64	Sun Jul 26 00:16:43 2009	(r195880)
+++ projects/ppc64/sys/conf/Makefile.powerpc64	Sun Jul 26 03:20:12 2009	(r195881)
@@ -8,7 +8,7 @@
 # This makefile is constructed from a machine description:
 #	config machineid
 # Most changes should be made in the machine description
-#	/sys/powerpc/conf/``machineid''
+#	/sys/powerpc64/conf/``machineid''
 # after which you should do
 #	 config machineid
 # Generic makefile changes should be made in

Modified: projects/ppc64/sys/conf/files.powerpc
==============================================================================
--- projects/ppc64/sys/conf/files.powerpc	Sun Jul 26 00:16:43 2009	(r195880)
+++ projects/ppc64/sys/conf/files.powerpc	Sun Jul 26 03:20:12 2009	(r195881)
@@ -77,7 +77,6 @@ powerpc/aim/interrupt.c		optional	aim
 powerpc/aim/locore.S		optional	aim no-obj
 powerpc/aim/machdep.c		optional	aim
 powerpc/aim/mmu_oea.c		optional	aim
-powerpc/aim/mmu_oea64.c		optional	aim
 powerpc/aim/mp_cpudep.c		optional	aim smp
 powerpc/aim/nexus.c		optional	aim
 powerpc/aim/ofw_machdep.c	optional	aim
@@ -87,6 +86,7 @@ powerpc/aim/swtch.S		optional	aim
 powerpc/aim/trap.c		optional	aim
 powerpc/aim/uma_machdep.c	optional	aim
 powerpc/aim/vm_machdep.c	optional	aim
+powerpc/aim64/mmu_oea64.c	optional	aim
 powerpc/booke/clock.c		optional	e500
 powerpc/booke/copyinout.c	optional	e500
 powerpc/booke/interrupt.c	optional	e500

Modified: projects/ppc64/sys/conf/files.powerpc64
==============================================================================
--- projects/ppc64/sys/conf/files.powerpc64	Sun Jul 26 00:16:43 2009	(r195880)
+++ projects/ppc64/sys/conf/files.powerpc64	Sun Jul 26 03:20:12 2009	(r195881)
@@ -17,7 +17,6 @@ font.h				optional	sc			\
 
 crypto/blowfish/bf_enc.c	optional	crypto | ipsec
 crypto/des/des_enc.c		optional	crypto | ipsec | netsmb
-dev/bm/if_bm.c			optional	bm powermac
 dev/adb/adb_bus.c		optional	adb
 dev/adb/adb_kbd.c		optional	adb
 dev/adb/adb_mouse.c		optional	adb
@@ -39,7 +38,6 @@ dev/ofw/ofw_standard.c		optional	aim
 dev/powermac_nvram/powermac_nvram.c optional	powermac_nvram powermac
 dev/scc/scc_bfe_macio.c		optional	scc powermac
 dev/sound/macio/aoa.c		optional	snd_davbus | snd_ai2s powermac
-dev/sound/macio/davbus.c	optional	snd_davbus powermac
 dev/sound/macio/i2s.c		optional	snd_ai2s powermac
 dev/sound/macio/snapper.c	optional	snd_ai2s iicbus powermac
 dev/sound/macio/tumbler.c	optional	snd_ai2s iicbus powermac
@@ -66,21 +64,20 @@ libkern/ucmpdi2.c		standard
 libkern/udivdi3.c		standard
 libkern/umoddi3.c		standard
 powerpc/aim/clock.c		optional	aim
-powerpc/aim/copyinout.c		optional	aim
 powerpc/aim/interrupt.c		optional	aim
-powerpc/aim/locore.S		optional	aim no-obj
-powerpc/aim/machdep.c		optional	aim
-powerpc/aim/mmu_oea.c		optional	aim
-powerpc/aim/mmu_oea64.c		optional	aim
 powerpc/aim/mp_cpudep.c		optional	aim smp
 powerpc/aim/nexus.c		optional	aim
 powerpc/aim/ofw_machdep.c	optional	aim
 powerpc/aim/ofwmagic.S		optional	aim
 powerpc/aim/platform_chrp.c	optional	aim
-powerpc/aim/swtch.S		optional	aim
 powerpc/aim/trap.c		optional	aim
 powerpc/aim/uma_machdep.c	optional	aim
 powerpc/aim/vm_machdep.c	optional	aim
+#powerpc/aim64/copyinout.c	optional	aim
+powerpc/aim64/locore.S		optional	aim no-obj
+powerpc/aim64/machdep.c		optional	aim
+powerpc/aim64/mmu_oea64.c	optional	aim
+powerpc/aim64/swtch.S		optional	aim
 powerpc/cpufreq/dfs.c		optional	cpufreq
 powerpc/cpufreq/pcr.c		optional	cpufreq aim
 powerpc/ofw/ofw_cpu.c		optional	aim
@@ -91,11 +88,8 @@ powerpc/ofw/ofw_syscons.c	optional	sc ai
 powerpc/powermac/ata_kauai.c	optional	powermac ata | powermac atamacio
 powerpc/powermac/ata_macio.c	optional	powermac ata | powermac atamacio
 powerpc/powermac/ata_dbdma.c	optional	powermac ata | powermac atamacio
-powerpc/powermac/cuda.c		optional	powermac cuda
 powerpc/powermac/cpcht.c	optional	powermac pci
 powerpc/powermac/dbdma.c	optional	powermac pci
-powerpc/powermac/grackle.c	optional	powermac pci
-powerpc/powermac/hrowpic.c	optional	powermac pci
 powerpc/powermac/kiic.c		optional	powermac kiic
 powerpc/powermac/macgpio.c	optional	powermac pci 
 powerpc/powermac/macio.c	optional	powermac pci
@@ -140,7 +134,3 @@ powerpc/powerpc/suswintr.c	standard
 powerpc/powerpc/syncicache.c	standard
 powerpc/powerpc/sys_machdep.c	standard
 powerpc/powerpc/uio_machdep.c	standard
-powerpc/psim/iobus.c 		optional	psim
-powerpc/psim/ata_iobus.c	optional	ata psim
-powerpc/psim/openpic_iobus.c	optional	psim
-powerpc/psim/uart_iobus.c	optional	uart psim

Modified: projects/ppc64/sys/conf/ldscript.powerpc64
==============================================================================
--- projects/ppc64/sys/conf/ldscript.powerpc64	Sun Jul 26 00:16:43 2009	(r195880)
+++ projects/ppc64/sys/conf/ldscript.powerpc64	Sun Jul 26 03:20:12 2009	(r195881)
@@ -1,6 +1,6 @@
 /* $FreeBSD$ */
 
-OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
+OUTPUT_FORMAT("elf64-powerpc", "elf64-powerpc", "elf64-powerpc")
 OUTPUT_ARCH(powerpc)
 ENTRY(__start)
 SEARCH_DIR(/usr/lib);

Copied: projects/ppc64/sys/powerpc/aim64/locore.S (from r195651, projects/ppc64/sys/powerpc/aim/locore.S)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/ppc64/sys/powerpc/aim64/locore.S	Sun Jul 26 03:20:12 2009	(r195881, copy of r195651, projects/ppc64/sys/powerpc/aim/locore.S)
@@ -0,0 +1,209 @@
+/* $FreeBSD$ */
+/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
+
+/*-
+ * Copyright (C) 2001 Benno Rice
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*-
+ * Copyright (C) 1995, 1996 Wolfgang Solfrank.
+ * Copyright (C) 1995, 1996 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "assym.s"
+
+#include <sys/syscall.h>
+
+#include <machine/trap.h>
+#include <machine/param.h>
+#include <machine/sr.h>
+#include <machine/spr.h>
+#include <machine/psl.h>
+#include <machine/asm.h>
+
+/* Locate the per-CPU data structure */
+#define GET_CPUINFO(r)  \
+        mfsprg0  r
+
+/*
+ * Compiled KERNBASE location and the kernel load address
+ */
+        .globl  kernbase
+        .set    kernbase, KERNBASE
+
+#define	TMPSTKSZ	8192		/* 8K temporary stack */
+
+/*
+ * Globals
+ */
+	.data
+	.align	4
+GLOBAL(tmpstk)
+	.space	TMPSTKSZ
+GLOBAL(esym)
+	.long	0			/* end of symbol table */
+
+GLOBAL(ofmsr)
+	.long	0, 0, 0, 0, 0		/* msr/sprg0-3 used in Open Firmware */
+
+#define	INTRCNT_COUNT	256		/* max(HROWPIC_IRQMAX,OPENPIC_IRQMAX) */
+GLOBAL(intrnames)
+	.space	INTRCNT_COUNT * (MAXCOMLEN + 1) * 2
+GLOBAL(eintrnames)
+	.align 4
+GLOBAL(intrcnt)
+	.space	INTRCNT_COUNT * 4 * 2
+GLOBAL(eintrcnt)
+
+/*
+ * File-scope for locore.S
+ */
+idle_u:
+	.long	0			/* fake uarea during idle after exit */
+openfirmware_entry:
+	.long	0			/* Open Firmware entry point */
+srsave:
+	.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+
+	.text
+	.globl	btext
+btext:
+
+/*
+ * This symbol is here for the benefit of kvm_mkdb, and is supposed to
+ * mark the start of kernel text.
+ */
+	.globl	kernel_text
+kernel_text:
+
+/*
+ * Startup entry.  Note, this must be the first thing in the text
+ * segment!
+ */
+	.text
+	.globl	__start
+__start:
+	li	8,0
+	li	9,0x100
+	mtctr	9
+1:
+	dcbf	0,8
+	icbi	0,8
+	addi	8,8,0x20
+	bdnz	1b
+	sync
+	isync
+
+	/* Save the argument pointer and length */
+	mr	20,6
+	mr	21,7
+
+	lis	8,openfirmware_entry@ha
+	stw	5,openfirmware_entry@l(8) /* save client interface handler */
+
+	lis	1,(tmpstk+TMPSTKSZ-16)@ha
+	addi	1,1,(tmpstk+TMPSTKSZ-16)@l
+
+	mfmsr	0
+	lis	9,ofmsr@ha
+	stwu	0,ofmsr@l(9)
+
+	mfsprg0	0			/* save SPRG0-3 */
+	stw	0,4(9)			/* ofmsr[1] = sprg0 */
+	mfsprg1 0
+	stw	0,8(9)			/* ofmsr[2] = sprg1 */
+	mfsprg2 0
+	stw	0,12(9)			/* ofmsr[3] = sprg2 */
+	mfsprg3 0
+	stw	0,16(9)			/* ofmsr[4] = sprg3 */
+	
+	bl	OF_initial_setup
+
+	lis	4,end@ha
+	addi	4,4,end@l
+	mr	5,4
+
+	lis	3,kernel_text@ha
+	addi	3,3,kernel_text@l
+
+	/* Restore the argument pointer and length */
+	mr	6,20
+	mr	7,21
+
+	bl	powerpc_init
+	mr	%r1, %r3
+	li	%r3, 0
+	stw	%r3, 0(%r1)
+	bl	mi_startup
+	b	OF_exit
+
+/*
+ * int setfault()
+ *
+ * Similar to setjmp to setup for handling faults on accesses to user memory.
+ * Any routine using this may only call bcopy, either the form below,
+ * or the (currently used) C code optimized, so it doesn't use any non-volatile
+ * registers.
+ */
+	.globl	setfault
+setfault:
+	mflr	0
+	mfcr	12
+	mfsprg	4,0
+	lwz	4,PC_CURTHREAD(4)
+	lwz	4,TD_PCB(4)
+	stw	3,PCB_ONFAULT(4)
+	stw	0,0(3)
+	stw	1,4(3)
+	stw	2,8(3)
+	stmw	12,12(3)
+	xor	3,3,3
+	blr
+
+#include <powerpc/aim/trap_subr.S>

Copied and modified: projects/ppc64/sys/powerpc/aim64/machdep.c (from r195651, projects/ppc64/sys/powerpc/aim/machdep.c)
==============================================================================
--- projects/ppc64/sys/powerpc/aim/machdep.c	Mon Jul 13 01:37:48 2009	(r195651, copy source)
+++ projects/ppc64/sys/powerpc/aim64/machdep.c	Sun Jul 26 03:20:12 2009	(r195881)
@@ -137,7 +137,7 @@ struct pcpu __pcpu[MAXCPU];
 
 static struct trapframe frame0;
 
-char		machine[] = "powerpc";
+char		machine[] = "powerpc64";
 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
 
 static void	cpu_startup(void *);
@@ -163,9 +163,7 @@ long		Maxmem = 0;
 long		realmem = 0;
 
 struct pmap	ofw_pmap;
-extern int	ofmsr;
-
-struct bat	battable[16];
+extern register_t ofmsr;
 
 struct kva_md_info kmi;
 
@@ -209,7 +207,7 @@ cpu_startup(void *dummy)
 		for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
 			int size1 = phys_avail[indx + 1] - phys_avail[indx];
 
-			printf("0x%08x - 0x%08x, %d bytes (%d pages)\n",
+			printf("0x%16lx - 0x%16lx, %d bytes (%d pages)\n",
 			    phys_avail[indx], phys_avail[indx + 1] - 1, size1,
 			    size1 / PAGE_SIZE);
 		}
@@ -232,7 +230,6 @@ cpu_startup(void *dummy)
 
 extern char	kernel_text[], _end[];
 
-extern void	*testppc64, *testppc64size;
 extern void	*restorebridge, *restorebridgesize;
 extern void	*rfid_patch, *rfi_patch1, *rfi_patch2;
 #ifdef SMP
@@ -250,16 +247,13 @@ powerpc_init(u_int startkernel, u_int en
 {
 	struct		pcpu *pc;
 	vm_offset_t	end;
-	void		*generictrap;
-	size_t		trap_offset;
 	void		*kmdp;
         char		*env;
-	uint32_t	msr, scratch;
+	register_t	msr, scratch;
 	uint8_t		*cache_check;
 
 	end = 0;
 	kmdp = NULL;
-	trap_offset = 0;
 
 	/*
 	 * Parse metadata if present and fetch parameters.  Must be done
@@ -342,15 +336,15 @@ powerpc_init(u_int startkernel, u_int en
 		case IBM970FX:
 		case IBM970MP:
 		case IBM970GX:
-			scratch = mfspr64upper(SPR_HID5,msr);
-			scratch &= ~HID5_970_DCBZ_SIZE_HI;
-			mtspr64(SPR_HID5, scratch, mfspr(SPR_HID5), msr);
+			scratch = mfspr(SPR_HID5);
+			scratch &= ~((register_t)HID5_970_DCBZ_SIZE_HI << 32);
+			mtspr(SPR_HID5, scratch);
 			break;
 	}
 
 	/*
 	 * Initialize the interrupt tables and figure out our cache line
-	 * size and whether or not we need the 64-bit bridge code.
+	 * size.
 	 */
 
 	/*
@@ -365,8 +359,8 @@ powerpc_init(u_int startkernel, u_int en
 	/*
 	 * Measure the cacheline size using dcbz
 	 *
-	 * Use EXC_PGM as a playground. We are about to overwrite it
-	 * anyway, we know it exists, and we know it is cache-aligned.
+	 * Use EXC_PGM as a playground. We know it exists, is available
+	 * in real mode, and is cache-aligned.
 	 */
 
 	cache_check = (void *)EXC_PGM;
@@ -380,96 +374,40 @@ powerpc_init(u_int startkernel, u_int en
 	for (cacheline_size = 0; cacheline_size < 0x100 &&
 	    cache_check[cacheline_size] == 0; cacheline_size++);
 
-	/* Work around psim bug */
-	if (cacheline_size == 0) {
-		printf("WARNING: cacheline size undetermined, setting to 32\n");
-		cacheline_size = 32;
-	}
-
 	/*
-	 * Figure out whether we need to use the 64 bit PMAP. This works by
-	 * executing an instruction that is only legal on 64-bit PPC (mtmsrd),
-	 * and setting ppc64 = 0 if that causes a trap.
+	 * This is a PPC64 system
 	 */
 
 	ppc64 = 1;
 
-	bcopy(&testppc64, (void *)EXC_PGM,  (size_t)&testppc64size);
-	__syncicache((void *)EXC_PGM, (size_t)&testppc64size);
-
-	__asm __volatile("\
-		mfmsr %0;	\
-		mtsprg2 %1;	\
-				\
-		mtmsrd %0;	\
-		mfsprg2 %1;"
-	    : "=r"(scratch), "=r"(ppc64));
-
-	/*
-	 * Now copy restorebridge into all the handlers, if necessary,
-	 * and set up the trap tables.
-	 */
-
-	if (ppc64) {
-		/* Patch the two instances of rfi -> rfid */
-		bcopy(&rfid_patch,&rfi_patch1,4);
-	#ifdef KDB
-		/* rfi_patch2 is at the end of dbleave */
-		bcopy(&rfid_patch,&rfi_patch2,4);
-	#endif
-
-		/*
-		 * Copy a code snippet to restore 32-bit bridge mode
-		 * to the top of every non-generic trap handler
-		 */
-
-		trap_offset += (size_t)&restorebridgesize;
-		bcopy(&restorebridge, (void *)EXC_RST, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_DSI, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_ALI, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_PGM, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_MCHK, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_TRC, trap_offset); 
-		bcopy(&restorebridge, (void *)EXC_BPT, trap_offset); 
-
-		/*
-		 * Set the common trap entry point to the one that
-		 * knows to restore 32-bit operation on execution.
-		 */
-
-		generictrap = &trapcode64;
-	} else {
-		generictrap = &trapcode;
-	}
-
 #ifdef SMP
-	bcopy(&rstcode, (void *)(EXC_RST + trap_offset),  (size_t)&rstsize);
+	bcopy(&rstcode, (void *)EXC_RST,  (size_t)&rstsize);
 #else
-	bcopy(generictrap, (void *)EXC_RST,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_RST,  (size_t)&trapsize);
 #endif
 
 #ifdef KDB
-	bcopy(&dblow,	(void *)(EXC_MCHK + trap_offset), (size_t)&dbsize);
-	bcopy(&dblow,   (void *)(EXC_PGM + trap_offset),  (size_t)&dbsize);
-	bcopy(&dblow,   (void *)(EXC_TRC + trap_offset),  (size_t)&dbsize);
-	bcopy(&dblow,   (void *)(EXC_BPT + trap_offset),  (size_t)&dbsize);
+	bcopy(&dblow,	(void *)EXC_MCHK, (size_t)&dbsize);
+	bcopy(&dblow,   (void *)EXC_PGM,  (size_t)&dbsize);
+	bcopy(&dblow,   (void *)EXC_TRC,  (size_t)&dbsize);
+	bcopy(&dblow,   (void *)EXC_BPT,  (size_t)&dbsize);
 #else
-	bcopy(generictrap, (void *)EXC_MCHK, (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_PGM,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_TRC,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_BPT,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_MCHK, (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_PGM,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_TRC,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_BPT,  (size_t)&trapsize);
 #endif
-	bcopy(&dsitrap,  (void *)(EXC_DSI + trap_offset),  (size_t)&dsisize);
-	bcopy(&alitrap,  (void *)(EXC_ALI + trap_offset),  (size_t)&alisize);
-	bcopy(generictrap, (void *)EXC_ISI,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_EXI,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_FPU,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_DECR, (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_SC,   (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_FPA,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_VEC,  (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_VECAST, (size_t)&trapsize);
-	bcopy(generictrap, (void *)EXC_THRM, (size_t)&trapsize);
+	bcopy(&dsitrap,  (void *)(EXC_DSI),  (size_t)&dsisize);
+	bcopy(&alitrap,  (void *)(EXC_ALI),  (size_t)&alisize);
+	bcopy(&trapcode, (void *)EXC_ISI,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_EXI,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_FPU,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_DECR, (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_SC,   (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_FPA,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_VEC,  (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_VECAST, (size_t)&trapsize);
+	bcopy(&trapcode, (void *)EXC_THRM, (size_t)&trapsize);
 	__syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
 
 	/*
@@ -489,10 +427,7 @@ powerpc_init(u_int startkernel, u_int en
 	 * in case the platform module had a better idea of what we
 	 * should do.
 	 */
-	if (ppc64)
-		pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
-	else
-		pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);
+	pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
 
 	pmap_bootstrap(startkernel, endkernel);
 	mtmsr(mfmsr() | PSL_IR|PSL_DR|PSL_ME|PSL_RI);
@@ -720,15 +655,6 @@ sigreturn(struct thread *td, struct sigr
 	return (EJUSTRETURN);
 }
 
-#ifdef COMPAT_FREEBSD4
-int
-freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
-{
-
-	return sigreturn(td, (struct sigreturn_args *)uap);
-}
-#endif
-
 /*
  * Construct a PCB from a trapframe. This is called from kdb_trap() where
  * we want to start a backtrace from the function that caused us to enter
@@ -907,7 +833,7 @@ cpu_idle(int busy)
 #ifdef INVARIANTS
 	if ((msr & PSL_EE) != PSL_EE) {
 		struct thread *td = curthread;
-		printf("td msr %x\n", td->td_md.md_saved_msr);
+		printf("td msr %#lx\n", td->td_md.md_saved_msr);
 		panic("ints disabled in idleproc!");
 	}
 #endif

Copied and modified: projects/ppc64/sys/powerpc/aim64/mmu_oea64.c (from r195651, projects/ppc64/sys/powerpc/aim/mmu_oea64.c)
==============================================================================
--- projects/ppc64/sys/powerpc/aim/mmu_oea64.c	Mon Jul 13 01:37:48 2009	(r195651, copy source)
+++ projects/ppc64/sys/powerpc/aim64/mmu_oea64.c	Sun Jul 26 03:20:12 2009	(r195881)
@@ -142,6 +142,7 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm_pager.h>
 #include <vm/uma.h>
 
+#include <machine/_inttypes.h>
 #include <machine/cpu.h>
 #include <machine/platform.h>
 #include <machine/frame.h>
@@ -159,10 +160,10 @@ __FBSDID("$FreeBSD$");
 
 #define TODO	panic("%s: not implemented", __func__);
 
-static __inline u_int32_t
-cntlzw(volatile u_int32_t a) {
-	u_int32_t b;
-	__asm ("cntlzw %0, %1" : "=r"(b) : "r"(a));
+static __inline register_t
+cntlzd(volatile register_t a) {
+	register_t b;
+	__asm ("cntlzd %0, %1" : "=r"(b) : "r"(a));
 	return b;
 }
 
@@ -709,8 +710,8 @@ moea64_bridge_cpu_bootstrap(mmu_t mmup, 
 		mtsrin(i << ADDR_SR_SHFT, kernel_pmap->pm_sr[i]);
 	}
 	__asm __volatile ("sync; mtsdr1 %0; isync"
-	    :: "r"((u_int)moea64_pteg_table 
-		     | (32 - cntlzw(moea64_pteg_mask >> 11))));
+	    :: "r"((uintptr_t)moea64_pteg_table 
+		     | (64 - cntlzd(moea64_pteg_mask >> 11))));
 	tlbia();
 }
 
@@ -1156,7 +1157,7 @@ moea64_zero_page_area(mmu_t mmu, vm_page
 	vm_offset_t pa = VM_PAGE_TO_PHYS(m);
 
 	if (!moea64_initialized)
-		panic("moea64_zero_page: can't zero pa %#x", pa);
+		panic("moea64_zero_page: can't zero pa %#" PRIxPTR, pa);
 	if (size + off > PAGE_SIZE)
 		panic("moea64_zero_page: size + off > PAGE_SIZE");
 
@@ -1571,7 +1572,8 @@ moea64_kenter(mmu_t mmu, vm_offset_t va,
 
 	if (!pmap_bootstrapped) {
 		if (va >= VM_MIN_KERNEL_ADDRESS && va < VM_MAX_KERNEL_ADDRESS)
-			panic("Trying to enter an address in KVA -- %#x!\n",pa);
+			panic("Trying to enter an address in KVA -- %#"
+			    PRIxPTR "!\n",pa);
 	}
 
 	pte_lo = moea64_calc_wimg(pa);
@@ -1584,7 +1586,7 @@ moea64_kenter(mmu_t mmu, vm_offset_t va,
 	TLBIE(kernel_pmap, va);
 
 	if (error != 0 && error != ENOENT)
-		panic("moea64_kenter: failed to enter va %#x pa %#x: %d", va,
+		panic("moea64_kenter: failed to enter va %#zx pa %#zx: %d", va,
 		    pa, error);
 
 	/*
@@ -2032,7 +2034,7 @@ moea64_pvo_enter(pmap_t pm, uma_zone_t z
 	 */
 	if (bootstrap) {
 		if (moea64_bpvo_pool_index >= BPVO_POOL_SIZE) {
-			panic("moea64_enter: bpvo pool exhausted, %d, %d, %d",
+			panic("moea64_enter: bpvo pool exhausted, %d, %d, %zd",
 			      moea64_bpvo_pool_index, BPVO_POOL_SIZE, 
 			      BPVO_POOL_SIZE * sizeof(struct pvo_entry));
 		}

Copied: projects/ppc64/sys/powerpc/aim64/swtch.S (from r195651, projects/ppc64/sys/powerpc/aim/swtch.S)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/ppc64/sys/powerpc/aim64/swtch.S	Sun Jul 26 03:20:12 2009	(r195881, copy of r195651, projects/ppc64/sys/powerpc/aim/swtch.S)
@@ -0,0 +1,190 @@
+/* $FreeBSD$ */
+/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
+
+/*-
+ * Copyright (C) 2001 Benno Rice
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+/*-
+ * Copyright (C) 1995, 1996 Wolfgang Solfrank.
+ * Copyright (C) 1995, 1996 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "assym.s"
+
+#include <sys/syscall.h>
+
+#include <machine/trap.h>
+#include <machine/param.h>
+#include <machine/sr.h>
+#include <machine/psl.h>
+#include <machine/asm.h>
+
+/*
+ * void cpu_throw(struct thread *old, struct thread *new)
+ */
+ENTRY(cpu_throw)
+	mr	%r15, %r4
+	b	cpu_switchin
+
+/*
+ * void cpu_switch(struct thread *old,
+ *		   struct thread *new,
+ *		   struct mutex *mtx); 
+ *
+ * Switch to a new thread saving the current state in the old thread.
+ */
+ENTRY(cpu_switch)
+	stw	%r5,TD_LOCK(%r3)	/* ULE:	update old thread's lock */
+					/* XXX needs to change for MP */
+
+	lwz	%r5,TD_PCB(%r3)		/* Get the old thread's PCB ptr */
+	mr	%r12,%r2	
+	stmw	%r12,PCB_CONTEXT(%r5)	/* Save the non-volatile GP regs.
+					   These can now be used for scratch */
+
+	mfcr	%r16			/* Save the condition register */
+	stw	%r16,PCB_CR(%r5)
+	mflr	%r16			/* Save the link register */
+	stw	%r16,PCB_LR(%r5)
+	mfsr	%r16,USER_SR		/* Save USER_SR for copyin/out */
+	isync
+	stw	%r16,PCB_AIM_USR(%r5)
+	stw	%r1,PCB_SP(%r5)		/* Save the stack pointer */
+
+	mr	%r14,%r3		/* Copy the old thread ptr... */
+	mr	%r15,%r4		/* and the new thread ptr in scratch */
+	
+	lwz	%r6,PCB_FLAGS(%r5)
+	/* Save FPU context if needed */
+	andi.	%r6, %r6, PCB_FPU
+	beq	.L1
+	bl	save_fpu
+
+.L1:
+	lwz	%r6,PCB_FLAGS(%r5)
+	/* Save Altivec context if needed */
+	andi.	%r6, %r6, PCB_VEC
+	beq	.L2
+	bl	save_vec
+	
+.L2:
+	mr	%r3,%r14		/* restore old thread ptr */
+	bl	pmap_deactivate		/* Deactivate the current pmap */
+
+cpu_switchin:
+	mfsprg	%r7,0			/* Get the pcpu pointer */
+	stw	%r15,PC_CURTHREAD(%r7)	/* Store new current thread */
+	lwz	%r17,TD_PCB(%r15)	/* Store new current PCB */
+	stw	%r17,PC_CURPCB(%r7)
+
+	mr	%r3,%r15		/* Get new thread ptr */
+	bl	pmap_activate		/* Activate the new address space */
+
+	lwz	%r6, PCB_FLAGS(%r17)
+	/* Restore FPU context if needed */
+	andi.	%r6, %r6, PCB_FPU
+	beq	.L3
+	mr	%r3,%r15		/* Pass curthread to enable_fpu */
+	bl	enable_fpu
+
+.L3:
+	lwz	%r6, PCB_FLAGS(%r17)
+	/* Restore Altivec context if needed */
+	andi.	%r6, %r6, PCB_VEC
+	beq	.L4
+	mr	%r3,%r15		/* Pass curthread to enable_vec */
+	bl	enable_vec
+
+	/* thread to restore is in r3 */
+.L4:
+	mr	%r3,%r17		/* Recover PCB ptr */
+	lmw	%r12,PCB_CONTEXT(%r3)	/* Load the non-volatile GP regs */
+	mr	%r2,%r12
+	lwz	%r5,PCB_CR(%r3)		/* Load the condition register */
+	mtcr	%r5
+	lwz	%r5,PCB_LR(%r3)		/* Load the link register */
+	mtlr	%r5
+	lwz	%r5,PCB_AIM_USR(%r3)	/* Load the USER_SR segment reg */
+	mtsr	USER_SR,%r5
+	isync
+	lwz	%r1,PCB_SP(%r3)		/* Load the stack pointer */
+	/*
+	 * Perform a dummy stwcx. to clear any reservations we may have
+	 * inherited from the previous thread. It doesn't matter if the
+	 * stwcx succeeds or not. pcb_context[0] can be clobbered.
+	 */
+	stwcx.	%r1, 0, %r3
+	blr
+
+/*
+ * savectx(pcb)
+ * Update pcb, saving current processor state
+ */
+ENTRY(savectx)
+	mr	%r12,%r2
+	stmw	%r12,PCB_CONTEXT(%r3)	/* Save the non-volatile GP regs */
+	mfcr	%r4			/* Save the condition register */
+	stw	%r4,PCB_CONTEXT(%r3)
+	blr
+
+/*
+ * fork_trampoline()
+ * Set up the return from cpu_fork()
+ */
+ENTRY(fork_trampoline)
+	lwz	%r3,CF_FUNC(%r1)
+	lwz	%r4,CF_ARG0(%r1)
+	lwz	%r5,CF_ARG1(%r1)
+	bl	fork_exit
+	addi	%r1,%r1,CF_SIZE-FSP	/* Allow 8 bytes in front of
+					   trapframe to simulate FRAME_SETUP
+					   does when allocating space for
+					   a frame pointer/saved LR */
+	b	trapexit

Copied and modified: projects/ppc64/sys/powerpc/aim64/trap_subr.S (from r195651, projects/ppc64/sys/powerpc/aim/trap_subr.S)
==============================================================================
--- projects/ppc64/sys/powerpc/aim/trap_subr.S	Mon Jul 13 01:37:48 2009	(r195651, copy source)
+++ projects/ppc64/sys/powerpc/aim64/trap_subr.S	Sun Jul 26 03:20:12 2009	(r195881)
@@ -92,116 +92,116 @@
 /* Have to enable translation to allow access of kernel stack: */	\
 	GET_CPUINFO(%r31);						\
 	mfsrr0	%r30;							\
-	stw	%r30,(savearea+CPUSAVE_SRR0)(%r31);	/* save SRR0 */	\
+	std	%r30,(savearea+CPUSAVE_SRR0)(%r31);	/* save SRR0 */	\
 	mfsrr1	%r30;							\
-	stw	%r30,(savearea+CPUSAVE_SRR1)(%r31);	/* save SRR1 */	\
+	std	%r30,(savearea+CPUSAVE_SRR1)(%r31);	/* save SRR1 */	\
 	mfmsr	%r30;							\
 	ori	%r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */	\
 	mtmsr	%r30;			/* stack can now be accessed */	\
 	isync;								\
 	mfsprg1	%r31;			/* get saved SP */		\
-	stwu	%r31,-FRAMELEN(%r1);	/* save it in the callframe */	\
-	stw	%r0, FRAME_0+8(%r1);	/* save r0 in the trapframe */	\
-	stw	%r31,FRAME_1+8(%r1);	/* save SP   "      "       */	\
-	stw	%r2, FRAME_2+8(%r1);	/* save r2   "      "       */	\
-	stw	%r28,FRAME_LR+8(%r1);	/* save LR   "      "       */	\
+	stdu	%r31,-FRAMELEN(%r1);	/* save it in the callframe */	\
+	std	%r0, FRAME_0+8(%r1);	/* save r0 in the trapframe */	\
+	std	%r31,FRAME_1+8(%r1);	/* save SP   "      "       */	\
+	std	%r2, FRAME_2+8(%r1);	/* save r2   "      "       */	\
+	std	%r28,FRAME_LR+8(%r1);	/* save LR   "      "       */	\
 	stw	%r29,FRAME_CR+8(%r1);	/* save CR   "      "       */	\
 	GET_CPUINFO(%r2);						\
-	lwz	%r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */	\
-	lwz	%r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */	\
-	lwz	%r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */	\
-	lwz	%r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */	\
-	stw	%r3,  FRAME_3+8(%r1);	/* save r3-r31 */		\
-	stw	%r4,  FRAME_4+8(%r1);					\
-	stw	%r5,  FRAME_5+8(%r1);					\
-	stw	%r6,  FRAME_6+8(%r1);					\
-	stw	%r7,  FRAME_7+8(%r1);					\
-	stw	%r8,  FRAME_8+8(%r1);					\
-	stw	%r9,  FRAME_9+8(%r1);					\
-	stw	%r10, FRAME_10+8(%r1);					\
-	stw	%r11, FRAME_11+8(%r1);					\
-	stw	%r12, FRAME_12+8(%r1);					\
-	stw	%r13, FRAME_13+8(%r1);					\
-	stw	%r14, FRAME_14+8(%r1);					\
-	stw	%r15, FRAME_15+8(%r1);					\
-	stw	%r16, FRAME_16+8(%r1);					\
-	stw	%r17, FRAME_17+8(%r1);					\
-	stw	%r18, FRAME_18+8(%r1);					\
-	stw	%r19, FRAME_19+8(%r1);					\
-	stw	%r20, FRAME_20+8(%r1);					\
-	stw	%r21, FRAME_21+8(%r1);					\
-	stw	%r22, FRAME_22+8(%r1);					\
-	stw	%r23, FRAME_23+8(%r1);					\
-	stw	%r24, FRAME_24+8(%r1);					\
-	stw	%r25, FRAME_25+8(%r1);					\
-	stw	%r26, FRAME_26+8(%r1);					\
-	stw	%r27, FRAME_27+8(%r1);					\
-	stw	%r28, FRAME_28+8(%r1);					\
-	stw	%r29, FRAME_29+8(%r1);					\
-	stw	%r30, FRAME_30+8(%r1);					\
-	stw	%r31, FRAME_31+8(%r1);					\
-	lwz	%r28,(savearea+CPUSAVE_AIM_DAR)(%r2);  /* saved DAR */	\
+	ld	%r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */	\
+	ld	%r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */	\
+	ld	%r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */	\
+	ld	%r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */	\
+	std	%r3,  FRAME_3+8(%r1);	/* save r3-r31 */		\
+	std	%r4,  FRAME_4+8(%r1);					\
+	std	%r5,  FRAME_5+8(%r1);					\
+	std	%r6,  FRAME_6+8(%r1);					\
+	std	%r7,  FRAME_7+8(%r1);					\
+	std	%r8,  FRAME_8+8(%r1);					\
+	std	%r9,  FRAME_9+8(%r1);					\
+	std	%r10, FRAME_10+8(%r1);					\
+	std	%r11, FRAME_11+8(%r1);					\
+	std	%r12, FRAME_12+8(%r1);					\
+	std	%r13, FRAME_13+8(%r1);					\
+	std	%r14, FRAME_14+8(%r1);					\
+	std	%r15, FRAME_15+8(%r1);					\
+	std	%r16, FRAME_16+8(%r1);					\
+	std	%r17, FRAME_17+8(%r1);					\
+	std	%r18, FRAME_18+8(%r1);					\
+	std	%r19, FRAME_19+8(%r1);					\
+	std	%r20, FRAME_20+8(%r1);					\
+	std	%r21, FRAME_21+8(%r1);					\
+	std	%r22, FRAME_22+8(%r1);					\
+	std	%r23, FRAME_23+8(%r1);					\
+	std	%r24, FRAME_24+8(%r1);					\
+	std	%r25, FRAME_25+8(%r1);					\
+	std	%r26, FRAME_26+8(%r1);					\
+	std	%r27, FRAME_27+8(%r1);					\
+	std	%r28, FRAME_28+8(%r1);					\
+	std	%r29, FRAME_29+8(%r1);					\
+	std	%r30, FRAME_30+8(%r1);					\
+	std	%r31, FRAME_31+8(%r1);					\
+	ld	%r28,(savearea+CPUSAVE_AIM_DAR)(%r2);  /* saved DAR */	\
 	lwz	%r29,(savearea+CPUSAVE_AIM_DSISR)(%r2);/* saved DSISR */\
-	lwz	%r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */	\
-	lwz	%r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */	\
+	ld	%r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */	\
+	ld	%r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */	\
 	mfxer	%r3;							\
 	mfctr	%r4;							\
 	mfsprg3	%r5;							\
-	stw	%r3, FRAME_XER+8(1);	/* save xer/ctr/exc */		\
-	stw	%r4, FRAME_CTR+8(1);					\
-	stw	%r5, FRAME_EXC+8(1);					\
-	stw	%r28,FRAME_AIM_DAR+8(1);				\
+	std	%r3, FRAME_XER+8(1);	/* save xer/ctr/exc */		\
+	std	%r4, FRAME_CTR+8(1);					\
+	std	%r5, FRAME_EXC+8(1);					\
+	std	%r28,FRAME_AIM_DAR+8(1);				\
 	stw	%r29,FRAME_AIM_DSISR+8(1); /* save dsisr/srr0/srr1 */	\
-	stw	%r30,FRAME_SRR0+8(1);					\
-	stw	%r31,FRAME_SRR1+8(1)
+	std	%r30,FRAME_SRR0+8(1);					\
+	std	%r31,FRAME_SRR1+8(1)
 
 #define	FRAME_LEAVE(savearea)						\
 /* Now restore regs: */							\
-	lwz	%r2,FRAME_SRR0+8(%r1);					\
-	lwz	%r3,FRAME_SRR1+8(%r1);					\
-	lwz	%r4,FRAME_CTR+8(%r1);					\
-	lwz	%r5,FRAME_XER+8(%r1);					\
-	lwz	%r6,FRAME_LR+8(%r1);					\
+	ld	%r2,FRAME_SRR0+8(%r1);					\
+	ld	%r3,FRAME_SRR1+8(%r1);					\
+	ld	%r4,FRAME_CTR+8(%r1);					\
+	ld	%r5,FRAME_XER+8(%r1);					\
+	ld	%r6,FRAME_LR+8(%r1);					\
 	GET_CPUINFO(%r7);						\
-	stw	%r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */	\
-	stw	%r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */	\
+	std	%r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */	\
+	std	%r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */	\
 	lwz	%r7,FRAME_CR+8(%r1);					\
 	mtctr	%r4;							\
 	mtxer	%r5;							\
 	mtlr	%r6;							\
 	mtsprg1	%r7;			/* save cr */			\
-	lwz	%r31,FRAME_31+8(%r1);   /* restore r0-31 */		\
-	lwz	%r30,FRAME_30+8(%r1);					\
-	lwz	%r29,FRAME_29+8(%r1);					\
-	lwz	%r28,FRAME_28+8(%r1);					\
-	lwz	%r27,FRAME_27+8(%r1);					\
-	lwz	%r26,FRAME_26+8(%r1);					\
-	lwz	%r25,FRAME_25+8(%r1);					\
-	lwz	%r24,FRAME_24+8(%r1);					\
-	lwz	%r23,FRAME_23+8(%r1);					\
-	lwz	%r22,FRAME_22+8(%r1);					\
-	lwz	%r21,FRAME_21+8(%r1);					\
-	lwz	%r20,FRAME_20+8(%r1);					\
-	lwz	%r19,FRAME_19+8(%r1);					\
-	lwz	%r18,FRAME_18+8(%r1);					\
-	lwz	%r17,FRAME_17+8(%r1);					\
-	lwz	%r16,FRAME_16+8(%r1);					\
-	lwz	%r15,FRAME_15+8(%r1);					\
-	lwz	%r14,FRAME_14+8(%r1);					\
-	lwz	%r13,FRAME_13+8(%r1);					\
-	lwz	%r12,FRAME_12+8(%r1);					\
-	lwz	%r11,FRAME_11+8(%r1);					\
-	lwz	%r10,FRAME_10+8(%r1);					\
-	lwz	%r9, FRAME_9+8(%r1);					\
-	lwz	%r8, FRAME_8+8(%r1);					\
-	lwz	%r7, FRAME_7+8(%r1);					\
-	lwz	%r6, FRAME_6+8(%r1);					\
-	lwz	%r5, FRAME_5+8(%r1);					\
-	lwz	%r4, FRAME_4+8(%r1);					\
-	lwz	%r3, FRAME_3+8(%r1);					\
-	lwz	%r2, FRAME_2+8(%r1);					\
-	lwz	%r0, FRAME_0+8(%r1);					\
-	lwz	%r1, FRAME_1+8(%r1);					\
+	ld	%r31,FRAME_31+8(%r1);   /* restore r0-31 */		\
+	ld	%r30,FRAME_30+8(%r1);					\

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***



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