Date: Wed, 25 Sep 2002 21:12:52 +0800 (KRAST) From: Eugene Grosbein <eugen@grosbein.pp.ru> To: FreeBSD-gnats-submit@FreeBSD.org Subject: kern/43361: typo in src/sys/i386/i386/initcpu.c Message-ID: <200209251312.g8PDCqgq004518@grosbein.pp.ru>
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>Number: 43361 >Category: kern >Synopsis: typo in src/sys/i386/i386/initcpu.c >Confidential: no >Severity: non-critical >Priority: low >Responsible: freebsd-bugs >State: open >Quarter: >Keywords: >Date-Required: >Class: doc-bug >Submitter-Id: current-users >Arrival-Date: Wed Sep 25 06:20:02 PDT 2002 >Closed-Date: >Last-Modified: >Originator: Eugene Grosbein >Release: FreeBSD 4.7-RC i386 >Organization: Svyaz Service JSC >Environment: System: FreeBSD grosbein.pp.ru 4.7-RC FreeBSD 4.7-RC #0: Sat Sep 21 21:21:43 KRAST 2002 eu@grosbein.pp.ru:/usr/local/obj/usr/local/src/sys/DADV i386 >Description: There is a typo in a comment in src/sys/i386/i386/initcpu.c >How-To-Repeat: N/A >Fix: --- i386/i386/initcpu.c.orig Wed Sep 25 21:12:01 2002 +++ i386/i386/initcpu.c Wed Sep 25 21:12:22 2002 @@ -597,7 +597,7 @@ #if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE) /* - * OS should flush L1 cahce by itself because no PC-98 supports + * OS should flush L1 cache by itself because no PC-98 supports * non-Intel CPUs. Use wbinvd instruction before DMA transfer * when need_pre_dma_flush = 1, use invd instruction after DMA * transfer when need_post_dma_flush = 1. If your CPU upgrade Eugene Grosbein >Release-Note: >Audit-Trail: >Unformatted: To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-bugs" in the body of the message
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