Date: Fri, 20 Sep 2002 21:58:09 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 17829 for review Message-ID: <200209210458.g8L4w9m5030049@freefall.freebsd.org>
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http://people.freebsd.org/~peter/p4db/chv.cgi?CH=17829 Change 17829 by peter@peter_daintree on 2002/09/20 21:57:13 argh, I've had it. This lousy SMP/APIC code is giving me a headache. Out with it! We always said we needed to report it, here's our chance. If necessary, re-copy it from i386 later but for now start with the easy case. Affected files ... .. //depot/projects/hammer/sys/x86_64/acpica/acpi_machdep.c#2 edit .. //depot/projects/hammer/sys/x86_64/include/atomic.h#3 edit .. //depot/projects/hammer/sys/x86_64/include/clock.h#3 edit .. //depot/projects/hammer/sys/x86_64/include/param.h#3 edit .. //depot/projects/hammer/sys/x86_64/include/pmap.h#2 edit .. //depot/projects/hammer/sys/x86_64/include/segments.h#3 edit .. //depot/projects/hammer/sys/x86_64/isa/clock.c#3 edit .. //depot/projects/hammer/sys/x86_64/isa/icu.h#3 edit .. //depot/projects/hammer/sys/x86_64/isa/intr_machdep.c#4 edit .. //depot/projects/hammer/sys/x86_64/isa/intr_machdep.h#3 edit .. //depot/projects/hammer/sys/x86_64/isa/vector.s#3 edit .. //depot/projects/hammer/sys/x86_64/pci/pci_cfgreg.c#2 edit .. //depot/projects/hammer/sys/x86_64/x86_64/autoconf.c#2 edit .. //depot/projects/hammer/sys/x86_64/x86_64/critical.c#2 edit .. //depot/projects/hammer/sys/x86_64/x86_64/exception.s#7 edit .. //depot/projects/hammer/sys/x86_64/x86_64/genassym.c#4 edit .. //depot/projects/hammer/sys/x86_64/x86_64/locore.s#9 edit .. //depot/projects/hammer/sys/x86_64/x86_64/machdep.c#12 edit .. //depot/projects/hammer/sys/x86_64/x86_64/mem.c#2 edit .. //depot/projects/hammer/sys/x86_64/x86_64/nexus.c#4 edit .. //depot/projects/hammer/sys/x86_64/x86_64/pmap.c#4 edit .. //depot/projects/hammer/sys/x86_64/x86_64/swtch.s#5 edit .. //depot/projects/hammer/sys/x86_64/x86_64/sys_machdep.c#5 edit .. //depot/projects/hammer/sys/x86_64/x86_64/trap.c#10 edit .. //depot/projects/hammer/sys/x86_64/x86_64/vm_machdep.c#5 edit Differences ... ==== //depot/projects/hammer/sys/x86_64/acpica/acpi_machdep.c#2 (text+ko) ==== @@ -330,9 +330,6 @@ acpi_install_wakeup_handler(sc); -#ifdef APIC_IO - acpi_SetIntrModel(ACPI_INTR_APIC); -#endif return (0); } ==== //depot/projects/hammer/sys/x86_64/include/atomic.h#3 (text+ko) ==== @@ -81,7 +81,7 @@ * For userland, assume the SMP case and use lock prefixes so that * the binaries will run on both types of systems. */ -#if defined(SMP) || !defined(_KERNEL) +#if !defined(_KERNEL) #define MPLOCKED lock ; #else #define MPLOCKED ==== //depot/projects/hammer/sys/x86_64/include/clock.h#3 (text+ko) ==== @@ -22,9 +22,6 @@ extern u_int tsc_freq; extern int tsc_is_broken; extern int wall_cmos_clock; -#ifdef APIC_IO -extern int apic_8254_intr; -#endif /* * Driver to clock driver interface. ==== //depot/projects/hammer/sys/x86_64/include/param.h#3 (text+ko) ==== @@ -84,11 +84,7 @@ #endif #define MID_MACHINE MID_X86_64 -#ifdef SMP -#define MAXCPU 16 -#else #define MAXCPU 1 -#endif /* SMP */ #define ALIGNBYTES _ALIGNBYTES #define ALIGN(p) _ALIGN(p) ==== //depot/projects/hammer/sys/x86_64/include/pmap.h#2 (text+ko) ==== @@ -100,28 +100,17 @@ #define NKPT 30 /* actual number of kernel page tables */ #endif #ifndef NKPDE -#ifdef SMP -#define NKPDE (KVA_PAGES - 2) /* addressable number of page tables/pde's */ -#else #define NKPDE (KVA_PAGES - 1) /* addressable number of page tables/pde's */ #endif -#endif /* * The *PTDI values control the layout of virtual memory * * XXX This works for now, but I am not real happy with it, I'll fix it * right after I fix locore.s and the magic 28K hole - * - * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff */ #define APTDPTDI (NPDEPG-1) /* alt ptd entry that points to APTD */ -#ifdef SMP -#define MPPTDI (APTDPTDI-1) /* per cpu ptd entry */ -#define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */ -#else #define KPTDI (APTDPTDI-NKPDE)/* start of kernel virtual pde's */ -#endif /* SMP */ #define PTDPTDI (KPTDI-1) /* ptd entry that points to ptd! */ #define UMAXPTDI (PTDPTDI-1) /* ptd entry for user space end */ #define UMAXPTEOFF (NPTEPG) /* pte entry for user space end */ ==== //depot/projects/hammer/sys/x86_64/include/segments.h#3 (text+ko) ==== @@ -193,12 +193,7 @@ /* * Size of IDT table */ - -#if defined(SMP) || defined(APIC_IO) -#define NIDT 256 /* we use them all */ -#else #define NIDT 129 /* 32 reserved, 16 h/w, 0 s/w, linux's 0x80 */ -#endif /* SMP || APIC_IO */ #define NRSVIDT 32 /* reserved entries for cpu exceptions */ /* @@ -207,20 +202,11 @@ #define GNULL_SEL 0 /* Null Descriptor */ #define GCODE_SEL 1 /* Kernel Code Descriptor */ #define GDATA_SEL 2 /* Kernel Data Descriptor */ -#define GPRIV_SEL 3 /* SMP Per-Processor Private Data */ -#define GPROC0_SEL 4 /* Task state process slot zero and up */ -#define GLDT_SEL 5 /* LDT - eventually one per process */ -#define GUSERLDT_SEL 6 /* User LDT */ -#define GTGATE_SEL 7 /* Process task switch gate */ -#define GBIOSLOWMEM_SEL 8 /* BIOS low memory access (must be entry 8) */ -#define GPANIC_SEL 9 /* Task state to consider panic from */ -#define GBIOSCODE32_SEL 10 /* BIOS interface (32bit Code) */ -#define GBIOSCODE16_SEL 11 /* BIOS interface (16bit Code) */ -#define GBIOSDATA_SEL 12 /* BIOS interface (Data) */ -#define GBIOSUTIL_SEL 13 /* BIOS interface (Utility) */ -#define GBIOSARGS_SEL 14 /* BIOS interface (Arguments) */ - -#define NGDT 15 +#define GPROC0_SEL 3 /* Task state process slot zero and up */ +#define GLDT_SEL 4 /* LDT - eventually one per process */ +#define GUSERLDT_SEL 5 /* User LDT */ +#define GPANIC_SEL 6 /* Task state to consider panic from */ +#define NGDT 7 /* * Entries in the Local Descriptor Table (LDT) ==== //depot/projects/hammer/sys/x86_64/isa/clock.c#3 (text+ko) ==== @@ -72,12 +72,6 @@ #include <machine/limits.h> #include <machine/md_var.h> #include <machine/psl.h> -#ifdef APIC_IO -#include <machine/segments.h> -#endif -#if defined(SMP) || defined(APIC_IO) -#include <machine/smp.h> -#endif /* SMP || APIC_IO */ #include <machine/specialreg.h> #include <i386/isa/icu.h> @@ -90,14 +84,6 @@ #include <i386/isa/intr_machdep.h> -#ifdef APIC_IO -#include <i386/isa/intr_machdep.h> -/* The interrupt triggered by the 8254 (timer) chip */ -int apic_8254_intr; -static u_long read_intr_count(int vec); -static void setup_8254_mixed_mode(void); -#endif - /* * 32-bit time_t's can't reach leap years before 1904 or after 2036, so we * can use a simple formula for leap years. @@ -202,10 +188,6 @@ mtx_unlock_spin(&clock_lock); } timer_func(&frame); -#ifdef SMP - if (timer_func == hardclock) - forward_hardclock(); -#endif switch (timer0_state) { case RELEASED: @@ -216,9 +198,6 @@ >= hardclock_max_count) { timer0_prescaler_count -= hardclock_max_count; hardclock(&frame); -#ifdef SMP - forward_hardclock(); -#endif } break; @@ -251,9 +230,6 @@ timer_func = hardclock; timer0_state = RELEASED; hardclock(&frame); -#ifdef SMP - forward_hardclock(); -#endif } break; } @@ -372,9 +348,6 @@ { while (rtcin(RTC_INTR) & RTCIR_PERIOD) { statclock(&frame); -#ifdef SMP - forward_statclock(); -#endif } } @@ -803,7 +776,6 @@ #endif } -#if !defined(SMP) /* * We can not use the TSC in SMP mode, until we figure out a * cheap (impossible), reliable and precise (yeah right!) way @@ -831,8 +803,6 @@ tsc_timecounter.tc_frequency = tsc_freq; tc_init(&tsc_timecounter); } - -#endif /* !defined(SMP) */ } /* @@ -976,10 +946,6 @@ cpu_initclocks() { int diag; -#ifdef APIC_IO - int apic_8254_trial; - void *clkdesc; -#endif /* APIC_IO */ register_t crit; if (statclock_disable) { @@ -997,32 +963,6 @@ } /* Finish initializing 8253 timer 0. */ -#ifdef APIC_IO - - apic_8254_intr = isa_apic_irq(0); - apic_8254_trial = 0; - if (apic_8254_intr >= 0 ) { - if (apic_int_type(0, 0) == 3) - apic_8254_trial = 1; - } else { - /* look for ExtInt on pin 0 */ - if (apic_int_type(0, 0) == 3) { - apic_8254_intr = apic_irq(0, 0); - setup_8254_mixed_mode(); - } else - panic("APIC_IO: Cannot route 8254 interrupt to CPU"); - } - - inthand_add("clk", apic_8254_intr, (driver_intr_t *)clkintr, NULL, - INTR_TYPE_CLK | INTR_FAST, &clkdesc); - crit = intr_disable(); - mtx_lock_spin(&icu_lock); - INTREN(1 << apic_8254_intr); - mtx_unlock_spin(&icu_lock); - intr_restore(crit); - -#else /* APIC_IO */ - /* * XXX Check the priority of this interrupt handler. I * couldn't find anything suitable in the BSD/OS code (grog, @@ -1036,8 +976,6 @@ mtx_unlock_spin(&icu_lock); intr_restore(crit); -#endif /* APIC_IO */ - /* Initialize RTC. */ writertc(RTC_STATUSA, rtc_statusa); writertc(RTC_STATUSB, RTCSB_24HR); @@ -1049,118 +987,17 @@ if (diag != 0) printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS); -#ifdef APIC_IO - if (isa_apic_irq(8) != 8) - panic("APIC RTC != 8"); -#endif /* APIC_IO */ - inthand_add("rtc", 8, (driver_intr_t *)rtcintr, NULL, INTR_TYPE_CLK | INTR_FAST, NULL); crit = intr_disable(); mtx_lock_spin(&icu_lock); -#ifdef APIC_IO - INTREN(APIC_IRQ8); -#else INTREN(IRQ8); -#endif /* APIC_IO */ mtx_unlock_spin(&icu_lock); intr_restore(crit); writertc(RTC_STATUSB, rtc_statusb); - -#ifdef APIC_IO - if (apic_8254_trial) { - - printf("APIC_IO: Testing 8254 interrupt delivery\n"); - while (read_intr_count(8) < 6) - ; /* nothing */ - if (read_intr_count(apic_8254_intr) < 3) { - /* - * The MP table is broken. - * The 8254 was not connected to the specified pin - * on the IO APIC. - * Workaround: Limited variant of mixed mode. - */ - - crit = intr_disable(); - mtx_lock_spin(&icu_lock); - INTRDIS(1 << apic_8254_intr); - mtx_unlock_spin(&icu_lock); - intr_restore(crit); - inthand_remove(clkdesc); - printf("APIC_IO: Broken MP table detected: " - "8254 is not connected to " - "IOAPIC #%d intpin %d\n", - int_to_apicintpin[apic_8254_intr].ioapic, - int_to_apicintpin[apic_8254_intr].int_pin); - /* - * Revoke current ISA IRQ 0 assignment and - * configure a fallback interrupt routing from - * the 8254 Timer via the 8259 PIC to the - * an ExtInt interrupt line on IOAPIC #0 intpin 0. - * We reuse the low level interrupt handler number. - */ - if (apic_irq(0, 0) < 0) { - revoke_apic_irq(apic_8254_intr); - assign_apic_irq(0, 0, apic_8254_intr); - } - apic_8254_intr = apic_irq(0, 0); - setup_8254_mixed_mode(); - inthand_add("clk", apic_8254_intr, - (driver_intr_t *)clkintr, NULL, - INTR_TYPE_CLK | INTR_FAST, NULL); - crit = intr_disable(); - mtx_lock_spin(&icu_lock); - INTREN(1 << apic_8254_intr); - mtx_unlock_spin(&icu_lock); - intr_restore(crit); - } - - } - if (apic_int_type(0, 0) != 3 || - int_to_apicintpin[apic_8254_intr].ioapic != 0 || - int_to_apicintpin[apic_8254_intr].int_pin != 0) - printf("APIC_IO: routing 8254 via IOAPIC #%d intpin %d\n", - int_to_apicintpin[apic_8254_intr].ioapic, - int_to_apicintpin[apic_8254_intr].int_pin); - else - printf("APIC_IO: " - "routing 8254 via 8259 and IOAPIC #0 intpin 0\n"); -#endif - -} - -#ifdef APIC_IO -static u_long -read_intr_count(int vec) -{ - u_long *up; - up = intr_countp[vec]; - if (up) - return *up; - return 0UL; -} - -static void -setup_8254_mixed_mode() -{ - /* - * Allow 8254 timer to INTerrupt 8259: - * re-initialize master 8259: - * reset; prog 4 bytes, single ICU, edge triggered - */ - outb(IO_ICU1, 0x13); - outb(IO_ICU1 + 1, NRSVIDT); /* start vector (unused) */ - outb(IO_ICU1 + 1, 0x00); /* ignore slave */ - outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ - outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ - - /* program IO APIC for type 3 INT on INT0 */ - if (ext_int_setup(0, 0) < 0) - panic("8254 redirect via APIC pin0 impossible!"); } -#endif void setstatclockrate(int newhz) @@ -1235,13 +1072,7 @@ if (count < i8254_lastcount || (!i8254_ticked && (clkintr_pending || ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) && -#ifdef APIC_IO -#define lapic_irr1 ((volatile u_int *)&lapic)[0x210 / 4] /* XXX XXX */ - /* XXX this assumes that apic_8254_intr is < 24. */ - (lapic_irr1 & (1 << apic_8254_intr)))) -#else (inb(IO_ICU1) & 1))) -#endif )) { i8254_ticked = 1; i8254_offset += timer0_max_count; ==== //depot/projects/hammer/sys/x86_64/isa/icu.h#3 (text+ko) ==== @@ -58,26 +58,12 @@ void INTREN(u_int); void INTRDIS(u_int); -#ifdef APIC_IO -extern unsigned apic_imen; /* APIC interrupt mask enable */ -#else extern unsigned imen; /* interrupt mask enable */ -#endif #endif /* LOCORE */ -#ifdef APIC_IO /* - * Note: The APIC uses different values for IRQxxx. - * Unfortunately many drivers use the 8259 values as indexes - * into tables, etc. The APIC equivilants are kept as APIC_IRQxxx. - * The 8259 versions have to be used in SMP for legacy operation - * of the drivers. - */ -#endif /* APIC_IO */ - -/* * Interrupt enable bits - in normal order of priority (which we change) */ #define IRQ0 0x0001 /* highest priority - timer */ @@ -107,21 +93,10 @@ #define ICU_SLAVEID 2 #define ICU_EOI 0x20 -#ifdef APIC_IO - -/* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */ -#define ICU_LEN 32 -#define HWI_MASK 0xffffffff /* bits for h/w interrupts */ -#define NHWI 32 - -#else - #define ICU_LEN 16 /* 32-47 are ISA interrupts */ #define HWI_MASK 0xffff /* bits for h/w interrupts */ #define NHWI 16 -#endif /* APIC_IO */ - #define INTRCNT_COUNT (1 + ICU_LEN + 2 * ICU_LEN) #endif /* !_I386_ISA_ICU_H_ */ ==== //depot/projects/hammer/sys/x86_64/isa/intr_machdep.c#4 (text+ko) ==== @@ -58,10 +58,6 @@ #include <machine/md_var.h> #include <machine/segments.h> -#if defined(APIC_IO) -#include <machine/smp.h> -#include <machine/resource.h> -#endif /* APIC_IO */ #include <i386/isa/isa.h> #include <i386/isa/icu.h> @@ -70,9 +66,6 @@ #endif #include <i386/isa/intr_machdep.h> #include <sys/interrupt.h> -#ifdef APIC_IO -#include <machine/clock.h> -#endif /* * Per-interrupt data. @@ -93,16 +86,6 @@ &IDTVEC(fastintr10), &IDTVEC(fastintr11), &IDTVEC(fastintr12), &IDTVEC(fastintr13), &IDTVEC(fastintr14), &IDTVEC(fastintr15), -#if defined(APIC_IO) - &IDTVEC(fastintr16), &IDTVEC(fastintr17), - &IDTVEC(fastintr18), &IDTVEC(fastintr19), - &IDTVEC(fastintr20), &IDTVEC(fastintr21), - &IDTVEC(fastintr22), &IDTVEC(fastintr23), - &IDTVEC(fastintr24), &IDTVEC(fastintr25), - &IDTVEC(fastintr26), &IDTVEC(fastintr27), - &IDTVEC(fastintr28), &IDTVEC(fastintr29), - &IDTVEC(fastintr30), &IDTVEC(fastintr31), -#endif /* APIC_IO */ }; static unpendhand_t *fastunpend[ICU_LEN] = { @@ -114,16 +97,6 @@ &IDTVEC(fastunpend10), &IDTVEC(fastunpend11), &IDTVEC(fastunpend12), &IDTVEC(fastunpend13), &IDTVEC(fastunpend14), &IDTVEC(fastunpend15), -#if defined(APIC_IO) - &IDTVEC(fastunpend16), &IDTVEC(fastunpend17), - &IDTVEC(fastunpend18), &IDTVEC(fastunpend19), - &IDTVEC(fastunpend20), &IDTVEC(fastunpend21), - &IDTVEC(fastunpend22), &IDTVEC(fastunpend23), - &IDTVEC(fastunpend24), &IDTVEC(fastunpend25), - &IDTVEC(fastunpend26), &IDTVEC(fastunpend27), - &IDTVEC(fastunpend28), &IDTVEC(fastunpend29), - &IDTVEC(fastunpend30), &IDTVEC(fastunpend31), -#endif /* APIC_IO */ }; static inthand_t *slowintr[ICU_LEN] = { @@ -131,12 +104,6 @@ &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15), -#if defined(APIC_IO) - &IDTVEC(intr16), &IDTVEC(intr17), &IDTVEC(intr18), &IDTVEC(intr19), - &IDTVEC(intr20), &IDTVEC(intr21), &IDTVEC(intr22), &IDTVEC(intr23), - &IDTVEC(intr24), &IDTVEC(intr25), &IDTVEC(intr26), &IDTVEC(intr27), - &IDTVEC(intr28), &IDTVEC(intr29), &IDTVEC(intr30), &IDTVEC(intr31), -#endif /* APIC_IO */ }; static driver_intr_t isa_strayintr; @@ -172,27 +139,12 @@ } /* - * In the APIC_IO case we might be granted IRQ 2, as this is typically - * consumed by chaining between the two PIC components. If we're using - * the APIC, however, this may not be the case, and as such we should - * free the resource. (XXX untested) - * * The generic ISA attachment code will handle allocating any other resources * that we don't explicitly claim here. */ static int atpic_attach(device_t dev) { -#ifdef APIC_IO - int rid; - struct resource *res; - - /* try to allocate our IRQ and then free it */ - rid = 0; - res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 0); - if (res != NULL) - bus_release_resource(dev, SYS_RES_IRQ, rid, res); -#endif return(0); } @@ -438,11 +390,7 @@ { register_t crit; -#if defined(APIC_IO) - if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */ -#else if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID) -#endif /* APIC_IO */ return (EINVAL); #if 0 if (intr_handler[intr] != isa_strayintr) ==== //depot/projects/hammer/sys/x86_64/isa/intr_machdep.h#3 (text+ko) ==== @@ -42,89 +42,6 @@ #ifdef _KERNEL -#if defined(SMP) || defined(APIC_IO) -/* - * XXX FIXME: rethink location for all IPI vectors. - */ - -/* - APIC TPR priority vector levels: - - 0xff (255) +-------------+ - | | 15 (IPIs: Xspuriousint) - 0xf0 (240) +-------------+ - | | 14 - 0xe0 (224) +-------------+ - | | 13 - 0xd0 (208) +-------------+ - | | 12 - 0xc0 (192) +-------------+ - | | 11 - 0xb0 (176) +-------------+ - | | 10 (IPIs: Xcpustop) - 0xa0 (160) +-------------+ - | | 9 (IPIs: Xinvltlb) - 0x90 (144) +-------------+ - | | 8 (linux/BSD syscall, IGNORE FAST HW INTS) - 0x80 (128) +-------------+ - | | 7 (FAST_INTR 16-23) - 0x70 (112) +-------------+ - | | 6 (FAST_INTR 0-15) - 0x60 (96) +-------------+ - | | 5 (IGNORE HW INTS) - 0x50 (80) +-------------+ - | | 4 (2nd IO APIC) - 0x40 (64) +------+------+ - | | | 3 (upper APIC hardware INTs: PCI) - 0x30 (48) +------+------+ - | | 2 (start of hardware INTs: ISA) - 0x20 (32) +-------------+ - | | 1 (exceptions, traps, etc.) - 0x10 (16) +-------------+ - | | 0 (exceptions, traps, etc.) - 0x00 (0) +-------------+ - */ - -/* IDT vector base for regular (aka. slow) and fast interrupts */ -#define TPR_SLOW_INTS 0x20 -#define TPR_FAST_INTS 0x60 -/* XXX note that the AST interrupt is at 0x50 */ - -/* blocking values for local APIC Task Priority Register */ -#define TPR_BLOCK_HWI 0x4f /* hardware INTs */ -#define TPR_IGNORE_HWI 0x5f /* ignore INTs */ -#define TPR_BLOCK_FHWI 0x7f /* hardware FAST INTs */ -#define TPR_IGNORE_FHWI 0x8f /* ignore FAST INTs */ -#define TPR_BLOCK_XINVLTLB 0x9f /* */ -#define TPR_BLOCK_XCPUSTOP 0xaf /* */ -#define TPR_BLOCK_ALL 0xff /* all INTs */ - -/* TLB shootdowns */ -#define XINVLTLB_OFFSET (ICU_OFFSET + 112) /* 0x90 */ -#define XINVLPG_OFFSET (ICU_OFFSET + 113) /* 0x91 */ -#define XINVLRNG_OFFSET (ICU_OFFSET + 114) /* 0x92 */ - -/* inter-cpu clock handling */ -#define XHARDCLOCK_OFFSET (ICU_OFFSET + 120) /* 0x98 */ -#define XSTATCLOCK_OFFSET (ICU_OFFSET + 121) /* 0x99 */ - -/* inter-CPU rendezvous */ -#define XRENDEZVOUS_OFFSET (ICU_OFFSET + 122) /* 0x9A */ - -/* IPI to generate an additional software trap at the target CPU */ -/* XXX in the middle of the interrupt range, overlapping IRQ48 */ -#define XCPUAST_OFFSET (ICU_OFFSET + 48) /* 0x50 */ - -/* IPI to signal CPUs to stop and wait for another CPU to restart them */ -#define XCPUSTOP_OFFSET (ICU_OFFSET + 128) /* 0xA0 */ - -/* - * Note: this vector MUST be xxxx1111, 32 + 223 = 255 = 0xff: - */ -#define XSPURIOUSINT_OFFSET (ICU_OFFSET + 223) - -#endif /* SMP || APIC_IO */ - #ifdef LOCORE /* @@ -176,41 +93,6 @@ IDTVEC(fastunpend27), IDTVEC(fastunpend28), IDTVEC(fastunpend29), IDTVEC(fastunpend30), IDTVEC(fastunpend31); -#if defined(SMP) || defined(APIC_IO) -inthand_t - IDTVEC(fastintr16), IDTVEC(fastintr17), - IDTVEC(fastintr18), IDTVEC(fastintr19), - IDTVEC(fastintr20), IDTVEC(fastintr21), - IDTVEC(fastintr22), IDTVEC(fastintr23), - IDTVEC(fastintr24), IDTVEC(fastintr25), - IDTVEC(fastintr26), IDTVEC(fastintr27), - IDTVEC(fastintr28), IDTVEC(fastintr29), - IDTVEC(fastintr30), IDTVEC(fastintr31); -inthand_t - IDTVEC(intr16), IDTVEC(intr17), IDTVEC(intr18), IDTVEC(intr19), - IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23), - IDTVEC(intr24), IDTVEC(intr25), IDTVEC(intr26), IDTVEC(intr27), - IDTVEC(intr28), IDTVEC(intr29), IDTVEC(intr30), IDTVEC(intr31); - -inthand_t - Xinvltlb, /* TLB shootdowns - global */ - Xinvlpg, /* TLB shootdowns - 1 page */ - Xinvlrng, /* TLB shootdowns - page range */ - Xhardclock, /* Forward hardclock() */ - Xstatclock, /* Forward statclock() */ - Xcpuast, /* Additional software trap on other cpu */ - Xcpustop, /* CPU stops & waits for another CPU to restart it */ - Xspuriousint, /* handle APIC "spurious INTs" */ - Xrendezvous; /* handle CPU rendezvous */ - -#ifdef APIC_IO -/* - * This is to accommodate "mixed-mode" programming for - * motherboards that don't connect the 8254 to the IO APIC. - */ -#define AUTO_EOI_1 1 -#endif - #define NR_INTRNAMES (1 + ICU_LEN + 2 * ICU_LEN) void isa_defaultirq(void); ==== //depot/projects/hammer/sys/x86_64/isa/vector.s#3 (text+ko) ==== @@ -93,8 +93,4 @@ * loading segregs. */ -#ifdef APIC_IO -#include "i386/isa/apic_vector.s" -#else #include "i386/isa/icu_vector.s" -#endif /* APIC_IO */ ==== //depot/projects/hammer/sys/x86_64/pci/pci_cfgreg.c#2 (text+ko) ==== @@ -45,10 +45,6 @@ #include <machine/segments.h> #include <machine/pc/bios.h> -#ifdef APIC_IO -#include <machine/smp.h> -#endif /* APIC_IO */ - #include "pcib_if.h" #define PRVERB(a) printf a @@ -201,50 +197,8 @@ pci_cfgregread(int bus, int slot, int func, int reg, int bytes) { uint32_t line; -#ifdef APIC_IO - uint32_t pin; /* - * If we are using the APIC, the contents of the intline - * register will probably be wrong (since they are set up for - * use with the PIC. Rather than rewrite these registers - * (maybe that would be smarter) we trap attempts to read them - * and translate to our private vector numbers. - */ - if ((reg == PCIR_INTLINE) && (bytes == 1)) { - - pin = pci_do_cfgregread(bus, slot, func, PCIR_INTPIN, 1); - line = pci_do_cfgregread(bus, slot, func, PCIR_INTLINE, 1); - - if (pin != 0) { - int airq; - - airq = pci_apic_irq(bus, slot, pin); - if (airq >= 0) { - /* PCI specific entry found in MP table */ - if (airq != line) - undirect_pci_irq(line); - return(airq); - } else { - /* - * PCI interrupts might be redirected - * to the ISA bus according to some MP - * tables. Use the same methods as - * used by the ISA devices devices to - * find the proper IOAPIC int pin. - */ - airq = isa_apic_irq(line); - if ((airq >= 0) && (airq != line)) { - /* XXX: undirect_pci_irq() ? */ - undirect_isa_irq(line); - return(airq); - } - } - } - return(line); - } -#else - /* * Some BIOS writers seem to want to ignore the spec and put * 0 in the intline rather than 255 to indicate none. The rest of * the code uses 255 as an invalid IRQ. @@ -253,7 +207,6 @@ line = pci_do_cfgregread(bus, slot, func, PCIR_INTLINE, 1); return pci_i386_map_intline(line); } -#endif /* APIC_IO */ return(pci_do_cfgregread(bus, slot, func, reg, bytes)); } ==== //depot/projects/hammer/sys/x86_64/x86_64/autoconf.c#2 (text+ko) ==== @@ -77,11 +77,7 @@ #include <machine/bootinfo.h> #include <machine/md_var.h> -#ifdef APIC_IO -#include <machine/smp.h> -#else #include <i386/isa/icu.h> -#endif /* APIC_IO */ #ifdef DEV_ISA #include <isa/isavar.h> @@ -135,13 +131,8 @@ * * This is all rather inconvenient. */ -#ifdef APIC_IO - bsp_apic_configure(); - enable_intr(); -#else enable_intr(); INTREN(IRQ_SLAVE); -#endif /* APIC_IO */ /* nexus0 is the top of the i386 device tree */ device_add_child(root_bus, "nexus", 0); @@ -174,11 +165,6 @@ cninit_finish(); if (bootverbose) { - -#ifdef APIC_IO - imen_dump(); -#endif /* APIC_IO */ - /* * Print out the BIOS's idea of the disk geometries. */ ==== //depot/projects/hammer/sys/x86_64/x86_64/critical.c#2 (text+ko) ==== @@ -17,19 +17,13 @@ #include <sys/ucontext.h> #include <machine/critical.h> -#ifdef SMP -#include <machine/privatespace.h> -#include <machine/smp.h> -#else /* * XXX this mess to get sched_ithd() and call_fast_unpend() */ #include <sys/bus.h> -#include <machine/apic.h> #include <machine/frame.h> #include <i386/isa/icu.h> #include <i386/isa/intr_machdep.h> -#endif void i386_unpend(void); /* NOTE: not static, called from assembly */ ==== //depot/projects/hammer/sys/x86_64/x86_64/exception.s#7 (text+ko) ==== @@ -320,8 +320,4 @@ movl $T_PROTFLT,TF_TRAPNO(%esp) jmp alltraps_with_regs_pushed -#ifdef APIC_IO -#include "i386/isa/apic_ipl.s" -#else #include "i386/isa/icu_ipl.s" -#endif /* APIC_IO */ ==== //depot/projects/hammer/sys/x86_64/x86_64/genassym.c#4 (text+ko) ==== @@ -67,9 +67,6 @@ #include <nfs/rpcv2.h> #include <nfsclient/nfs.h> #include <nfsclient/nfsdiskless.h> -#ifdef SMP -#include <machine/apic.h> -#endif #include <machine/cpu.h> #include <machine/sigframe.h> #include <machine/proc.h> @@ -188,20 +185,10 @@ ASSYM(PC_CURRENTLDT, offsetof(struct pcpu, pc_currentldt)); ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid)); -#ifdef SMP -ASSYM(LA_VER, offsetof(struct LAPIC, version)); -ASSYM(LA_TPR, offsetof(struct LAPIC, tpr)); -ASSYM(LA_EOI, offsetof(struct LAPIC, eoi)); -ASSYM(LA_SVR, offsetof(struct LAPIC, svr)); -ASSYM(LA_ICR_LO, offsetof(struct LAPIC, icr_lo)); -ASSYM(LA_ICR_HI, offsetof(struct LAPIC, icr_hi)); -#endif - ASSYM(KCSEL, GSEL(GCODE_SEL, SEL_KPL)); ASSYM(KDSEL, GSEL(GDATA_SEL, SEL_KPL)); ASSYM(KPSEL, GSEL(GPRIV_SEL, SEL_KPL)); -ASSYM(BC32SEL, GSEL(GBIOSCODE32_SEL, SEL_KPL)); ASSYM(GPROC0_SEL, GPROC0_SEL); ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock)); ==== //depot/projects/hammer/sys/x86_64/x86_64/locore.s#9 (text+ko) ==== @@ -91,17 +91,6 @@ .set APTD,APTmap + (APTDPTDI * PAGE_SIZE) .set APTDpde,PTD + (APTDPTDI * PDESIZE) -#ifdef SMP -/* - * Define layout of per-cpu address space. - * This is "constructed" in locore.s on the BSP and in mp_machdep.c - * for each AP. DO NOT REORDER THESE WITHOUT UPDATING THE REST! - */ - .globl SMP_prvspace, lapic - .set SMP_prvspace,(MPPTDI << PDRSHIFT) - .set lapic,SMP_prvspace + (NPTEPG-1) * PAGE_SIZE -#endif /* SMP */ - /* * Compiled KERNBASE location */ @@ -125,22 +114,9 @@ KERNend: .long 0 /* phys addr end of kernel (just after bss) */ physfree: .long 0 /* phys addr of next free page */ -#ifdef SMP - .globl cpu0prvpage -cpu0pp: .long 0 /* phys addr cpu0 private pg */ -cpu0prvpage: .long 0 /* relocated version */ - - .globl SMPpt -SMPptpa: .long 0 /* phys addr SMP page table */ -SMPpt: .long 0 /* relocated version */ -#endif /* SMP */ - .globl IdlePTD IdlePTD: .long 0 /* phys addr of kernel PTD */ -#ifdef SMP - .globl KPTphys -#endif KPTphys: .long 0 /* phys addr of kernel page tables */ .globl proc0uarea, proc0kstack @@ -469,20 +445,6 @@ addl $KERNBASE, %esi movl %esi, R(proc0kstack) -#ifdef SMP -/* Allocate cpu0's private data page */ - ALLOCPAGES(1) - movl %esi,R(cpu0pp) - addl $KERNBASE, %esi - movl %esi, R(cpu0prvpage) /* relocated to KVM space */ - -/* Allocate SMP page table page */ - ALLOCPAGES(1) - movl %esi,R(SMPptpa) - addl $KERNBASE, %esi - movl %esi, R(SMPpt) /* relocated to KVM space */ -#endif /* SMP */ - /* Map read-only from zero to the end of the kernel text section */ xorl %eax,%eax xorl %edx,%edx @@ -522,37 +484,6 @@ movl $ISA_HOLE_LENGTH>>PAGE_SHIFT, %ecx fillkptphys($PG_RW) >>> TRUNCATED FOR MAIL (1000 lines) <<< To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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