Date: Mon, 22 Jan 1996 11:42:43 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: davidg@root.com Cc: lehey.pad@sni.de, hackers@freebsd.org Subject: Re: stanford benchmark/usenix Message-ID: <199601221842.LAA15590@phaeton.artisoft.com> In-Reply-To: <199601221310.FAA14741@Root.COM> from "David Greenman" at Jan 22, 96 05:10:05 am
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> >Yes, I thought of that. The alterneative of being able to run the > >versions on all processors rather defeats the advantage: I had thought > > Not at all. Most of the optimizations that can be made don't use > CPU-specific instructions. It's all in just organizing the instructions > a little differently are making some algorithmic changes to take better > advantage of difference cache quirks. I agree with David. It's not use of P5 instructions, it's ordering of 386-on-up instructions in most cases. So the code will run, but it will run slower on a hardware/code mismatch. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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