Date: Tue, 1 Oct 2002 13:11:17 -0700 (PDT) From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 18490 for review Message-ID: <200210012011.g91KBHu4076965@freefall.freebsd.org>
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http://people.freebsd.org/~peter/p4db/chv.cgi?CH=18490 Change 18490 by jhb@jhb_laptop on 2002/10/01 13:10:47 Various untested cleanups for alpha inline assembly that have been sitting on my laptop for just about forever. Affected files ... .. //depot/projects/smpng/sys/alpha/include/alpha_cpu.h#2 edit .. //depot/projects/smpng/sys/alpha/include/atomic.h#3 edit Differences ... ==== //depot/projects/smpng/sys/alpha/include/alpha_cpu.h#2 (text+ko) ==== @@ -353,11 +353,10 @@ static __inline void alpha_pal_cflush(u_int64_t pfn) { - register u_int64_t a0 __asm__("$16") = pfn; __asm__ __volatile__ ( "call_pal 0x1 #PAL_cflush" : - : "r" (a0)); + : "$16" (pfn)); } static __inline void @@ -369,21 +368,21 @@ static __inline void alpha_pal_wripir(u_int64_t ipir) { - register u_int64_t a0 __asm__("$16") = ipir; __asm__ __volatile__ ( "call_pal 0xd #PAL_ipir" - : "=r" (a0) - : "0" (a0) + : "+$16" (ipir) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline u_int64_t alpha_pal_rdmces(void) { - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x10 #PAL_OSF1_rdmces" - : "=r" (v0) + : "=$0" (v0) : : "$1", "$22", "$23", "$24", "$25"); return v0; @@ -392,45 +391,42 @@ static __inline void alpha_pal_wrmces(u_int64_t mces) { - register u_int64_t a0 __asm__("$16") = mces; __asm__ __volatile__ ( "call_pal 0x11 #PAL_wrmces" - : "=r" (a0) - : "0" (a0) + : "+$16" (mces) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline void alpha_pal_wrfen(u_int64_t fen) { - register u_int64_t a0 __asm__("$16") = fen; __asm__ __volatile__ ( "call_pal 0x2b #PAL_wrfen" - : "=r" (a0) - : "0" (a0) + : "+$16" (fen) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline void alpha_pal_wrvptptr(u_int64_t vptptr) { - register u_int64_t a0 __asm__("$16") = vptptr; __asm__ __volatile__ ( "call_pal 0x2d #PAL_wrvptptr" - : "=r" (a0) - : "0" (a0) + : "+$16" (vptptr) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline u_int64_t alpha_pal_swpctx(u_int64_t pcb) { - register u_int64_t a0 __asm__("$16") = pcb; - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x30 #PAL_OSF1_swpctx" - : "=r" (v0), "=r" (a0) - : "1" (a0) + : "=$0" (v0), "+$16" (pcb) + : : "$1", "$22", "$23", "$24", "$25", "memory"); return v0; } @@ -438,21 +434,21 @@ static __inline void alpha_pal_wrval(u_int64_t sysvalue) { - register u_int64_t a0 __asm__("$16") = sysvalue; __asm__ __volatile__ ( "call_pal 0x31 #PAL_wrval" - : "=r" (a0) - : "0" (a0) + : "+$16" (sysvalue) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline u_int64_t alpha_pal_rdval(void) { - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x32 #PAL_OSF1_rdval" - : "=r" (v0) + : "=$0" (v0) : : "$1", "$22", "$23", "$24", "$25"); return v0; @@ -461,36 +457,32 @@ static __inline void alpha_pal_tbi(u_int64_t op, u_int64_t va) { - register u_int64_t a0 __asm__("$16") = op; - register u_int64_t a1 __asm__("$17") = va; __asm__ __volatile__ ( "call_pal 0x33 #PAL_OSF1_tbi" - : "=r" (a0), "=r" (a1) - : "0" (a0), "1" (a1) + : "+$16" (op), "+$17" (va) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline void alpha_pal_wrent(void *ent, u_int64_t which) { - register u_int64_t a0 __asm__("$16") = (u_int64_t) ent; - register u_int64_t a1 __asm__("$17") = which; __asm__ __volatile__ ( "call_pal 0x34 #PAL_OSF1_wrent" - : "=r" (a0), "=r" (a1) - : "0" (a0), "1" (a1) + : "+$16" ((u_int64_t) ent), "+$17" (which) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline u_int64_t alpha_pal_swpipl(u_int64_t newipl) { - register u_int64_t a0 __asm__("$16") = newipl; - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x35 #PAL_OSF1_swpipl" - : "=r" (v0), "=r" (a0) - : "1" (a0) + : "=$0" (v0), "+$16" (newipl) + : : "$1", "$22", "$23", "$24", "$25"); return v0; } @@ -498,10 +490,11 @@ static __inline u_int64_t alpha_pal_rdps(void) { - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x36 #PAL_OSF1_rdps" - : "=r" (v0) + : "=$0" (v0) : : "$1", "$22", "$23", "$24", "$25"); return v0; @@ -510,24 +503,22 @@ static __inline void alpha_pal_wrusp(u_int64_t usp) { - register u_int64_t a0 __asm__("$16") = usp; __asm__ __volatile__ ( "call_pal 0x38 #PAL_wrusp" - : "=r" (a0) - : "0" (a0) + : "+$16" (usp) + : : "$1", "$22", "$23", "$24", "$25"); } static __inline u_int64_t alpha_pal_wrperfmon(u_int64_t arg0, u_int64_t arg1) { - register u_int64_t v0 __asm__("$0"); - register u_int64_t a0 __asm__("$16") = arg0; - register u_int64_t a1 __asm__("$17") = arg1; + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x39 #PAL_OSF1_wrperfmon" - : "=r" (a0), "=r" (a1), "=r" (v0) - : "0" (a0), "1" (a1) + : "+$16" (arg0), "+$17" (arg1), "=$0" (v0) + : : "$1", "$22", "$23", "$24", "$25"); return v0; } @@ -535,10 +526,11 @@ static __inline u_int64_t alpha_pal_rdusp(void) { - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x3a #PAL_OSF1_rdusp" - : "=r" (v0) + : "=$0" (v0) : : "$1", "$22", "$23", "$24", "$25"); return v0; @@ -547,10 +539,11 @@ static __inline u_int64_t alpha_pal_whami(void) { - register u_int64_t v0 __asm__("$0"); + u_int64_t v0; + __asm__ __volatile__ ( "call_pal 0x3c #PAL_OSF1_whami" - : "=r" (v0) + : "=$0" (v0) : : "$1", "$22", "$23", "$24", "$25"); return v0; ==== //depot/projects/smpng/sys/alpha/include/atomic.h#3 (text+ko) ==== @@ -69,16 +69,16 @@ u_int32_t temp; __asm __volatile ( - "1:\tldl_l %0, %2\n\t" /* load old value */ - "bic %0, %3, %0\n\t" /* calculate new value */ + "1:\tldl_l %0, %1\n\t" /* load old value */ + "bic %0, %2, %0\n\t" /* calculate new value */ "stl_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -87,16 +87,16 @@ u_int32_t temp; __asm __volatile ( - "1:\tldl_l %0, %2\n\t" /* load old value */ - "addl %0, %3, %0\n\t" /* calculate new value */ + "1:\tldl_l %0, %1\n\t" /* load old value */ + "addl %0, %2, %0\n\t" /* calculate new value */ "stl_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -105,16 +105,16 @@ u_int32_t temp; __asm __volatile ( - "1:\tldl_l %0, %2\n\t" /* load old value */ - "subl %0, %3, %0\n\t" /* calculate new value */ + "1:\tldl_l %0, %1\n\t" /* load old value */ + "subl %0, %2, %0\n\t" /* calculate new value */ "stl_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -124,15 +124,15 @@ __asm __volatile ( "wmb\n" /* ensure pending writes have drained */ - "1:\tldl_l %0,%3\n\t" /* load current value, asserting lock */ + "1:\tldl_l %0,%2\n\t" /* load current value, asserting lock */ "ldiq %1,0\n\t" /* value to store */ "stl_c %1,%2\n\t" /* attempt to store */ "beq %1,2f\n\t" /* if the store failed, spin */ "br 3f\n" /* it worked, exit */ "2:\tbr 1b\n" /* *addr not updated, loop */ "3:\tmb\n" /* it worked */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m"(*addr) + : "=&r"(result), "=&r"(temp), "+m" (*addr) + : : "memory"); return result; @@ -143,16 +143,16 @@ u_int64_t temp; __asm __volatile ( - "1:\tldq_l %0, %2\n\t" /* load old value */ - "bis %0, %3, %0\n\t" /* calculate new value */ + "1:\tldq_l %0, %1\n\t" /* load old value */ + "bis %0, %2, %0\n\t" /* calculate new value */ "stq_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -161,16 +161,16 @@ u_int64_t temp; __asm __volatile ( - "1:\tldq_l %0, %2\n\t" /* load old value */ - "bic %0, %3, %0\n\t" /* calculate new value */ + "1:\tldq_l %0, %1\n\t" /* load old value */ + "bic %0, %2, %0\n\t" /* calculate new value */ "stq_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -179,16 +179,16 @@ u_int64_t temp; __asm __volatile ( - "1:\tldq_l %0, %2\n\t" /* load old value */ - "addq %0, %3, %0\n\t" /* calculate new value */ + "1:\tldq_l %0, %1\n\t" /* load old value */ + "addq %0, %2, %0\n\t" /* calculate new value */ "stq_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -197,16 +197,16 @@ u_int64_t temp; __asm __volatile ( - "1:\tldq_l %0, %2\n\t" /* load old value */ - "subq %0, %3, %0\n\t" /* calculate new value */ + "1:\tldq_l %0, %1\n\t" /* load old value */ + "subq %0, %2, %0\n\t" /* calculate new value */ "stq_c %0, %1\n\t" /* attempt to store */ "beq %0, 2f\n\t" /* spin if failed */ "mb\n\t" /* drain to memory */ ".section .text3,\"ax\"\n" /* improve branch prediction */ "2:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (temp), "=m" (*p) - : "m" (*p), "r" (v) + : "=&r" (temp), "+m" (*p) + : "r" (v) : "memory"); } @@ -216,15 +216,15 @@ __asm __volatile ( "wmb\n" /* ensure pending writes have drained */ - "1:\tldq_l %0,%3\n\t" /* load current value, asserting lock */ + "1:\tldq_l %0,%2\n\t" /* load current value, asserting lock */ "ldiq %1,0\n\t" /* value to store */ "stq_c %1,%2\n\t" /* attempt to store */ "beq %1,2f\n\t" /* if the store failed, spin */ "br 3f\n" /* it worked, exit */ "2:\tbr 1b\n" /* *addr not updated, loop */ "3:\tmb\n" /* it worked */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m"(*addr) + : "=&r"(result), "=&r"(temp), "+m" (*addr) + : : "memory"); return result; @@ -355,7 +355,7 @@ u_int32_t ret; __asm __volatile ( - "1:\tldl_l %0, %4\n\t" /* load old value */ + "1:\tldl_l %0, %1\n\t" /* load old value */ "cmpeq %0, %2, %0\n\t" /* compare */ "beq %0, 2f\n\t" /* exit if not equal */ "mov %3, %0\n\t" /* value to store */ @@ -366,8 +366,8 @@ ".section .text3,\"ax\"\n" /* improve branch prediction */ "3:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (ret), "=m" (*p) - : "r" ((long)(int)cmpval), "r" (newval), "m" (*p) + : "=&r" (ret), "+m" (*p) + : "r" ((long)(int)cmpval), "r" (newval) : "memory"); return ret; @@ -384,7 +384,7 @@ u_int64_t ret; __asm __volatile ( - "1:\tldq_l %0, %4\n\t" /* load old value */ + "1:\tldq_l %0, %1\n\t" /* load old value */ "cmpeq %0, %2, %0\n\t" /* compare */ "beq %0, 2f\n\t" /* exit if not equal */ "mov %3, %0\n\t" /* value to store */ @@ -395,8 +395,8 @@ ".section .text3,\"ax\"\n" /* improve branch prediction */ "3:\tbr 1b\n" /* try again */ ".previous\n" - : "=&r" (ret), "=m" (*p) - : "r" (cmpval), "r" (newval), "m" (*p) + : "=&r" (ret), "+m" (*p) + : "r" (cmpval), "r" (newval) : "memory"); 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