Date: Sat, 19 Jun 2004 23:17:54 +1000 (EST) From: Bruce Evans <bde@zeta.org.au> To: Divacky Roman <xdivac02@stud.fit.vutbr.cz> Cc: current@freebsd.org Subject: Re: strange message appearing in a fresh current Message-ID: <20040619230557.H1028@gamplex.bde.org> In-Reply-To: <20040619112840.GC94870@stud.fit.vutbr.cz> References: <20040618104954.GA63085@stud.fit.vutbr.cz> <20040619171345.R3813@gamplex.bde.org> <20040619112840.GC94870@stud.fit.vutbr.cz>
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On Sat, 19 Jun 2004, Divacky Roman wrote:
> > > built for i686 cpu (amd duron) with -O -pipe
> >
> > Hmm. Don't Durons have FXSR? (I686_CPU or CPU_ENABLE_SSE) and not
> > CPU_DISABLE_SSE together with a CPU that supports FXSR should give
> > a configuration that is not affected by the bug.
>
> Origin = "AuthenticAMD" Id = 0x631 Stepping = 1
> Features=0x183f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
> AMD Features=0xc0440000<RSVD,AMIE,DSP,3DNow!>
>
> I just set
> cpu I686_CPU
>
> no CPU_* at all. And the bug is there...
Ah. It needs SSE in the cpuid too, and your Duron doesn't have it. I
think Athlons got SSE starting with the XP.
The configuration of this is confusing. From i386/initcpu.c:
% #if !defined(CPU_ENABLE_SSE) && defined(I686_CPU)
% #define CPU_ENABLE_SSE
% #endif
% #if defined(CPU_DISABLE_SSE)
% #undef CPU_ENABLE_SSE
% #endif
So I686_CPU gives CPU_ENABLE_SSE unless you use CPU_DISABLE_SSE.
% /*
% * Initialize CR4 (Control register 4) to enable SSE instructions.
% */
% void
% enable_sse(void)
% {
% #if defined(CPU_ENABLE_SSE)
% if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {
% load_cr4(rcr4() | CR4_FXSR | CR4_XMM);
% cpu_fxsr = hw_instruction_sse = 1;
% }
% #endif
% }
Here CPUID_XMM is a confusing alias for CPUID_SSE (the identifcation message
only prints "SSE"). So to get cpu_fxsr, you need CPU_ENABLE_SSE or
I686_CPU && !CPU_DISABLE_SSE in the FreeBSD config, and SSE and FXSR in
the hardware.
% } else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
% #if defined(I686_CPU) && defined(CPU_ATHLON_SSE_HACK)
% /*
% * Sometimes the BIOS doesn't enable SSE instructions.
% * According to AMD document 20734, the mobile
% * Duron, the (mobile) Athlon 4 and the Athlon MP
% * support SSE. These correspond to cpu_id 0x66X
% * or 0x67X.
% */
% if ((cpu_feature & CPUID_XMM) == 0 &&
% ((cpu_id & ~0xf) == 0x660 ||
% (cpu_id & ~0xf) == 0x670 ||
% (cpu_id & ~0xf) == 0x680)) {
% u_int regs[4];
% wrmsr(0xC0010015, rdmsr(0xC0010015) & ~0x08000);
% do_cpuid(1, regs);
% cpu_feature = regs[3];
% }
% #endif
And for broken BIOSes, CPU_ATHLON_SSE_HACK is also needed to get SSE.
Bruce
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