Date: Thu, 30 Jul 2009 18:28:00 +0000 (UTC) From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r195977 - in projects/ppc64/sys/powerpc: aim aim64 include powerpc Message-ID: <200907301828.n6UIS0cM033511@svn.freebsd.org>
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Author: nwhitehorn Date: Thu Jul 30 18:28:00 2009 New Revision: 195977 URL: http://svn.freebsd.org/changeset/base/195977 Log: Make sure to set the TOC pointer appropriately when starting a new thread, adjust all members to the trapframe to be of the same size to pacify DDB, which doesn't like some registers to be different sizes than others, and make our atomic functions have the correct return types. This (mostly the first item) gets us to a mount root prompt. Time to worry about userland. Modified: projects/ppc64/sys/powerpc/aim/swtch.S projects/ppc64/sys/powerpc/aim/vm_machdep.c projects/ppc64/sys/powerpc/aim64/swtch.S projects/ppc64/sys/powerpc/aim64/trap_subr.S projects/ppc64/sys/powerpc/include/atomic.h projects/ppc64/sys/powerpc/include/frame.h projects/ppc64/sys/powerpc/include/pcb.h projects/ppc64/sys/powerpc/powerpc/db_trace.c projects/ppc64/sys/powerpc/powerpc/genassym.c Modified: projects/ppc64/sys/powerpc/aim/swtch.S ============================================================================== --- projects/ppc64/sys/powerpc/aim/swtch.S Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/aim/swtch.S Thu Jul 30 18:28:00 2009 (r195977) @@ -85,7 +85,6 @@ ENTRY(cpu_switch) /* XXX needs to change for MP */ lwz %r5,TD_PCB(%r3) /* Get the old thread's PCB ptr */ - mr %r12,%r2 stmw %r12,PCB_CONTEXT(%r5) /* Save the non-volatile GP regs. These can now be used for scratch */ @@ -97,6 +96,7 @@ ENTRY(cpu_switch) isync stw %r16,PCB_AIM_USR_VSID(%r5) stw %r1,PCB_SP(%r5) /* Save the stack pointer */ + stw %r2,PCB_TOC(%r5) /* Save the TOC pointer */ mr %r14,%r3 /* Copy the old thread ptr... */ mr %r15,%r4 /* and the new thread ptr in scratch */ @@ -146,7 +146,6 @@ cpu_switchin: .L4: mr %r3,%r17 /* Recover PCB ptr */ lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */ - mr %r2,%r12 lwz %r5,PCB_CR(%r3) /* Load the condition register */ mtcr %r5 lwz %r5,PCB_LR(%r3) /* Load the link register */ @@ -155,6 +154,7 @@ cpu_switchin: mtsr USER_SR,%r5 isync lwz %r1,PCB_SP(%r3) /* Load the stack pointer */ + lwz %r2,PCB_TOC(%r3) /* Load the TOC pointer */ /* * Perform a dummy stwcx. to clear any reservations we may have * inherited from the previous thread. It doesn't matter if the @@ -168,7 +168,6 @@ cpu_switchin: * Update pcb, saving current processor state */ ENTRY(savectx) - mr %r12,%r2 stmw %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs */ mfcr %r4 /* Save the condition register */ stw %r4,PCB_CR(%r3) Modified: projects/ppc64/sys/powerpc/aim/vm_machdep.c ============================================================================== --- projects/ppc64/sys/powerpc/aim/vm_machdep.c Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/aim/vm_machdep.c Thu Jul 30 18:28:00 2009 (r195977) @@ -154,7 +154,7 @@ cpu_fork(struct thread *td1, struct proc p1 = td1->td_proc; pcb = (struct pcb *)((td2->td_kstack + - td2->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb)) & ~0x2fU); + td2->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb)) & ~0x2fUL); td2->td_pcb = pcb; /* Copy the pcb */ @@ -183,7 +183,8 @@ cpu_fork(struct thread *td1, struct proc pcb->pcb_sp = (register_t)cf; #ifdef __powerpc64__ - pcb->pcb_lr = *(register_t *)fork_trampoline; + pcb->pcb_lr = ((register_t *)fork_trampoline)[0]; + pcb->pcb_toc = ((register_t *)fork_trampoline)[1]; #else pcb->pcb_lr = (register_t)fork_trampoline; #endif Modified: projects/ppc64/sys/powerpc/aim64/swtch.S ============================================================================== --- projects/ppc64/sys/powerpc/aim64/swtch.S Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/aim64/swtch.S Thu Jul 30 18:28:00 2009 (r195977) @@ -85,7 +85,6 @@ ENTRY(cpu_switch) /* XXX needs to change for MP */ ld %r5,TD_PCB(%r3) /* Get the old thread's PCB ptr */ - mr %r12,%r2 std %r12,PCB_CONTEXT(%r5) /* Save the non-volatile GP regs. These can now be used for scratch */ std %r13,PCB_CONTEXT+1*8(%r5) @@ -109,7 +108,7 @@ ENTRY(cpu_switch) std %r31,PCB_CONTEXT+19*8(%r5) mfcr %r16 /* Save the condition register */ - stw %r16,PCB_CR(%r5) + std %r16,PCB_CR(%r5) mflr %r16 /* Save the link register */ std %r16,PCB_LR(%r5) @@ -122,6 +121,7 @@ ENTRY(cpu_switch) std %r14,PCB_AIM_USR_ESID(%r5) std %r15,PCB_AIM_USR_VSID(%r5) std %r1,PCB_SP(%r5) /* Save the stack pointer */ + std %r2,PCB_TOC(%r5) /* Save the TOC pointer */ mr %r14,%r3 /* Copy the old thread ptr... */ mr %r15,%r4 /* and the new thread ptr in scratch */ @@ -196,8 +196,7 @@ cpu_switchin: ld %r29,PCB_CONTEXT+17*8(%r3) ld %r30,PCB_CONTEXT+18*8(%r3) ld %r31,PCB_CONTEXT+19*8(%r3) - mr %r2,%r12 - lwz %r5,PCB_CR(%r3) /* Load the condition register */ + ld %r5,PCB_CR(%r3) /* Load the condition register */ mtcr %r5 ld %r5,PCB_LR(%r3) /* Load the link register */ mtlr %r5 @@ -207,6 +206,7 @@ cpu_switchin: slbmte %r5,%r6 isync ld %r1,PCB_SP(%r3) /* Load the stack pointer */ + ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ /* * Perform a dummy stwcx. to clear any reservations we may have * inherited from the previous thread. It doesn't matter if the @@ -220,7 +220,6 @@ cpu_switchin: * Update pcb, saving current processor state */ ENTRY(savectx) - mr %r12,%r2 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ std %r13,PCB_CONTEXT+1*8(%r3) std %r14,PCB_CONTEXT+2*8(%r3) @@ -243,7 +242,7 @@ ENTRY(savectx) std %r31,PCB_CONTEXT+19*8(%r3) mfcr %r4 /* Save the condition register */ - stw %r4,PCB_CR(%r3) + std %r4,PCB_CR(%r3) blr /* Modified: projects/ppc64/sys/powerpc/aim64/trap_subr.S ============================================================================== --- projects/ppc64/sys/powerpc/aim64/trap_subr.S Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/aim64/trap_subr.S Thu Jul 30 18:28:00 2009 (r195977) @@ -123,7 +123,7 @@ nslb: std %r31,FRAME_1+16(%r1); /* save SP " " */ \ std %r2, FRAME_2+16(%r1); /* save r2 " " */ \ std %r28,FRAME_LR+16(%r1); /* save LR " " */ \ - stw %r29,FRAME_CR+16(%r1); /* save CR " " */ \ + std %r29,FRAME_CR+16(%r1); /* save CR " " */ \ GET_CPUINFO(%r2); \ ld %r27,(savearea+CPUSAVE_R27)(%r2); /* get saved r27 */ \ ld %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */ \ @@ -160,18 +160,18 @@ nslb: std %r30, FRAME_30+16(%r1); \ std %r31, FRAME_31+16(%r1); \ ld %r28,(savearea+CPUSAVE_AIM_DAR)(%r2); /* saved DAR */ \ - lwz %r29,(savearea+CPUSAVE_AIM_DSISR)(%r2);/* saved DSISR */\ + ld %r29,(savearea+CPUSAVE_AIM_DSISR)(%r2);/* saved DSISR */\ ld %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */ \ ld %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */ \ mfxer %r3; \ mfctr %r4; \ mfsprg3 %r5; \ mtlr %r6; \ - stw %r3, FRAME_XER+16(1); /* save xer/ctr/exc */ \ + std %r3, FRAME_XER+16(1); /* save xer/ctr/exc */ \ std %r4, FRAME_CTR+16(1); \ std %r5, FRAME_EXC+16(1); \ std %r28,FRAME_AIM_DAR+16(1); \ - stw %r29,FRAME_AIM_DSISR+16(1); /* save dsisr/srr0/srr1 */ \ + std %r29,FRAME_AIM_DSISR+16(1); /* save dsisr/srr0/srr1 */ \ std %r30,FRAME_SRR0+16(1); \ std %r31,FRAME_SRR1+16(1) @@ -180,12 +180,12 @@ nslb: ld %r2,FRAME_SRR0+16(%r1); \ ld %r3,FRAME_SRR1+16(%r1); \ ld %r4,FRAME_CTR+16(%r1); \ - lwz %r5,FRAME_XER+16(%r1); \ + ld %r5,FRAME_XER+16(%r1); \ ld %r6,FRAME_LR+16(%r1); \ GET_CPUINFO(%r7); \ std %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */ \ std %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */ \ - lwz %r7,FRAME_CR+16(%r1); \ + ld %r7,FRAME_CR+16(%r1); \ mtctr %r4; \ mtxer %r5; \ mtsprg1 %r7; /* save cr */ \ @@ -313,7 +313,7 @@ CNAME(alitrap): mfdar %r30 mfdsisr %r31 std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) + std %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) mfsprg1 %r1 /* restore SP, in case of branch */ mflr %r28 /* save LR */ mfcr %r29 /* save CR */ @@ -375,7 +375,7 @@ disitrap: mfdar %r30 mfdsisr %r31 std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) + std %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) #ifdef KDB /* Try and detect a kernel stack overflow */ @@ -393,8 +393,8 @@ disitrap: GET_CPUINFO(%r1) ld %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) /* get DAR */ std %r30,(PC_DBSAVE +CPUSAVE_AIM_DAR)(%r1) /* save DAR */ - lwz %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) /* get DSISR */ - stw %r30,(PC_DBSAVE +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */ + ld %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) /* get DSISR */ + std %r30,(PC_DBSAVE +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */ ld %r31,(PC_DISISAVE+CPUSAVE_R27)(%r1) /* get r27 */ std %r31,(PC_DBSAVE +CPUSAVE_R27)(%r1) /* save r27 */ ld %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* get r28 */ Modified: projects/ppc64/sys/powerpc/include/atomic.h ============================================================================== --- projects/ppc64/sys/powerpc/include/atomic.h Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/include/atomic.h Thu Jul 30 18:28:00 2009 (r195977) @@ -515,10 +515,10 @@ ATOMIC_STORE_LOAD(long, 64) * two values are equal, update the value of *p with newval. Returns * zero if the compare failed, nonzero otherwise. */ -static __inline uint32_t +static __inline int atomic_cmpset_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval) { - uint32_t ret; + int ret; #ifdef __GNUCLIKE_ASM __asm __volatile ( @@ -541,10 +541,10 @@ atomic_cmpset_32(volatile uint32_t* p, u return (ret); } -static __inline u_long +static __inline int atomic_cmpset_long(volatile u_long* p, u_long cmpval, u_long newval) { - u_long ret; + int ret; #ifdef __GNUCLIKE_ASM __asm __volatile ( @@ -588,7 +588,7 @@ atomic_cmpset_long(volatile u_long* p, u atomic_cmpset_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new)) #endif -static __inline uint32_t +static __inline int atomic_cmpset_acq_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval) { int retval; @@ -598,24 +598,24 @@ atomic_cmpset_acq_32(volatile uint32_t * return (retval); } -static __inline uint32_t +static __inline int atomic_cmpset_rel_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval) { __ATOMIC_BARRIER; return (atomic_cmpset_32(p, cmpval, newval)); } -static __inline u_long +static __inline int atomic_cmpset_acq_long(volatile u_long *p, u_long cmpval, u_long newval) { - int retval; + u_long retval; retval = atomic_cmpset_long(p, cmpval, newval); __ATOMIC_BARRIER; return (retval); } -static __inline uint32_t +static __inline int atomic_cmpset_rel_long(volatile u_long *p, u_long cmpval, u_long newval) { __ATOMIC_BARRIER; Modified: projects/ppc64/sys/powerpc/include/frame.h ============================================================================== --- projects/ppc64/sys/powerpc/include/frame.h Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/include/frame.h Thu Jul 30 18:28:00 2009 (r195977) @@ -50,8 +50,8 @@ struct trapframe { register_t fixreg[32]; register_t lr; - int cr; - int xer; + register_t cr; + register_t xer; register_t ctr; register_t srr0; register_t srr1; @@ -60,7 +60,7 @@ struct trapframe { struct { /* dar & dsisr are only filled on a DSI trap */ register_t dar; - int dsisr; + register_t dsisr; } aim; struct { register_t dear; Modified: projects/ppc64/sys/powerpc/include/pcb.h ============================================================================== --- projects/ppc64/sys/powerpc/include/pcb.h Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/include/pcb.h Thu Jul 30 18:28:00 2009 (r195977) @@ -41,6 +41,7 @@ struct pcb { register_t pcb_context[20]; /* non-volatile r14-r31 */ register_t pcb_cr; /* Condition register */ register_t pcb_sp; /* stack pointer */ + register_t pcb_toc; /* toc pointer */ register_t pcb_lr; /* link register */ struct pmap *pcb_pm; /* pmap of our vmspace */ faultbuf *pcb_onfault; /* For use during Modified: projects/ppc64/sys/powerpc/powerpc/db_trace.c ============================================================================== --- projects/ppc64/sys/powerpc/powerpc/db_trace.c Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/powerpc/db_trace.c Thu Jul 30 18:28:00 2009 (r195977) @@ -221,7 +221,8 @@ db_backtrace(struct thread *td, db_addr_ case EXC_ALI: /* XXX take advantage of the union. */ db_printf("ALI trap @ %#zx (xSR %#x) ", - tf->cpu.aim.dar, tf->cpu.aim.dsisr); + tf->cpu.aim.dar, + (uint32_t)tf->cpu.aim.dsisr); goto print_trap; case EXC_ISI: trapstr = "ISI"; break; case EXC_PGM: trapstr = "PGM"; break; @@ -261,9 +262,11 @@ db_backtrace(struct thread *td, db_addr_ tf->srr1); } db_printf("%-10s r1=%#zx cr=%#x xer=%#x ctr=%#zx", - "", tf->fixreg[1], tf->cr, tf->xer, tf->ctr); + "", tf->fixreg[1], (uint32_t)tf->cr, + (uint32_t)tf->xer, tf->ctr); if (tf->exc == EXC_DSI) - db_printf(" sr=%#x", tf->cpu.aim.dsisr); + db_printf(" sr=%#x", + (uint32_t)tf->cpu.aim.dsisr); db_printf("\n"); stackframe = (db_addr_t) tf->fixreg[1]; if (kernel_only && (tf->srr1 & PSL_PR)) Modified: projects/ppc64/sys/powerpc/powerpc/genassym.c ============================================================================== --- projects/ppc64/sys/powerpc/powerpc/genassym.c Thu Jul 30 17:40:47 2009 (r195976) +++ projects/ppc64/sys/powerpc/powerpc/genassym.c Thu Jul 30 18:28:00 2009 (r195977) @@ -171,6 +171,7 @@ ASSYM(CF_SIZE, sizeof(struct callframe)) ASSYM(PCB_CONTEXT, offsetof(struct pcb, pcb_context)); ASSYM(PCB_CR, offsetof(struct pcb, pcb_cr)); ASSYM(PCB_SP, offsetof(struct pcb, pcb_sp)); +ASSYM(PCB_TOC, offsetof(struct pcb, pcb_toc)); ASSYM(PCB_LR, offsetof(struct pcb, pcb_lr)); ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
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