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Date:      Wed, 17 Jan 2001 10:43:10 -0500 (EST)
From:      Garrett Wollman <wollman@khavrinen.lcs.mit.edu>
To:        Peter Jeremy <peter.jeremy@alcatel.com.au>
Cc:        current@FreeBSD.ORG
Subject:   Re: Atomic breakage?
Message-ID:  <200101171543.KAA18055@khavrinen.lcs.mit.edu>
In-Reply-To: <20010117142654.A98607@gsmx07.alcatel.com.au>
References:  <3A64AA23.30035A1C@elischer.org> <Pine.BSF.4.21.0101171400210.3074-100000@besplex.bde.org> <20010116191009.E7240@fw.wintelcom.net> <20010117142654.A98607@gsmx07.alcatel.com.au>

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<<On Wed, 17 Jan 2001 14:26:54 +1100, Peter Jeremy <peter.jeremy@alcatel.com.au> said:

> To support multiple masters, you need proper locks.

On older processors, yes.  On processors with the CX8 feature bit set,
you can do it without any sort of locking (indeed, this is a primitive
that semaphores can be built upon).  Consider the following:

atomic_increment:
	; prologue
	; get EA into %esi
	movl (%esi), %eax
	movl 4(%esi), %edx
1:	movl %eax, %ebx
	movl %edx, %ecx
	incl %ebx
	adcl $0, %ecx
	cmpxchg8b (%esi)	; generates a locked bus cycle
	jne 1
	; epilogue

On pre-Pentium processors (which lack the CX8 feature) this sort of
sequence is impossible.  OTOH, I don't think SMP works on any
pre-Pentium processor, so again this degenerates to:

	pushfl
	cli
	incl (%esi)
	adcl $0, 4(%esi)
	popfl

...in the non-SMP case.

-GAWollman



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