Date: Sat, 24 May 2014 21:09:56 +0200 From: Michael Tuexen <tuexen@freebsd.org> To: Mark R V Murray <markm@FreeBSD.org> Cc: Hans Petter Selasky <hps@selasky.org>, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r266083 - in head/sys/arm: arm include Message-ID: <083E3DCB-F49A-4757-9CF8-689D04267E26@freebsd.org> In-Reply-To: <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org> References: <201405141911.s4EJBFZZ097826@svn.freebsd.org> <537D0952.2040001@selasky.org> <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org>
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On 22 May 2014, at 09:09, Mark R V Murray <markm@FreeBSD.org> wrote: >=20 > On 21 May 2014, at 21:15, Hans Petter Selasky <hps@selasky.org> wrote: >=20 >> On 05/14/14 21:11, Mark Murray wrote: >>> Author: markm >>> Date: Wed May 14 19:11:15 2014 >>> New Revision: 266083 >>> URL: http://svnweb.freebsd.org/changeset/base/266083 >>>=20 >>> Log: >>> Give suitably-endowed ARMs a register similar to the x86 TSC = register. >>>=20 >>=20 >> Hi, >>=20 >> Regression issue: >> This commit prevents RPI-B from booting. >=20 > Thanks, I=92ll look at it ASAP. Doesn't the ARM1176 use for example MRC p15, 0, <Rd>, c15, c12, 1 ; Read Cycle Counter Register to read the value, whereas the=20 you use=20 __asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=3Dr" (ccnt)); Best regards Michael >=20 > M > --=20 > Mark R V Murray >=20 >=20 >=20
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