Date: Sat, 18 Nov 2000 02:26:28 +0100 From: Bernd Walter <ticso@cicely8.cicely.de> To: John Baldwin <jhb@FreeBSD.ORG> Cc: =?iso-8859-1?Q?G=E9rard_Roudier?= <groudier@club-internet.fr>, freebsd-alpha@FreeBSD.ORG, Christian Weisgerber <naddy@mips.inka.de>, Andrew Gallatin <gallatin@cs.duke.edu> Subject: Re: PC164 IDE only works (was: SMPng stability) Message-ID: <20001118022627.A13890@cicely8.cicely.de> In-Reply-To: <XFMail.001117145002.jhb@FreeBSD.org>; from jhb@FreeBSD.ORG on Fri, Nov 17, 2000 at 02:50:02PM -0800 References: <Pine.LNX.4.10.10011172209490.1542-100000@linux.local> <XFMail.001117145002.jhb@FreeBSD.org>
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On Fri, Nov 17, 2000 at 02:50:02PM -0800, John Baldwin wrote: > What if your interrupt handler blocks on a mutex? Unless you make all mutexes > used by interrupts spin locks (which will chew up CPU time) you lose. Falling > back to using all spin mutexes should only be used as a last resort if you > can't find a way to allow an interrupt handler to block, and thus, to run in > its own context, potentially delayed. If I understood correct the PC164 has 3 points where ints can be ignored. 1. The IPL which uses a processor defined table. 2. The processor mask which mask each of the 4 incoming int lines separately (IDU ICSR register). Does anyone knows which lines are used for what? Access seems to be restricted to PAL-code and serviced via CSERVE. 3. The int PAL-chip which we are using by invooking PAL-code. Maybe variant 2 might be an option as it will be not worse as if all ints are used shared and maybe easier to implement than holding the IPL high. It will also mean that depending on the hardware design some int are still accepted which depend on a lower IPL. -- B.Walter COSMO-Project http://www.cosmo-project.de ticso@cicely.de Usergroup info@cosmo-project.de To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-alpha" in the body of the message
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