Date: Thu, 18 May 2000 11:39:43 +0100 (BST) From: Mark Powell <M.S.Powell@salford.ac.uk> To: "Mike C. Muir" <mmuir@es.co.nz> Cc: freebsd-stable@freebsd.org Subject: Re: MegaRAID compatible memory (was Re: HPDA/DAC960PL errors ) Message-ID: <Pine.BSF.4.21.0005181119400.55996-100000@plato.salford.ac.uk> In-Reply-To: <20000517160601.8061E1F95@mike.dhis.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Wed, 17 May 2000, Mike C. Muir wrote: > ECC is capable of correcting the error that is detected, where parity > can simply detect it. 'ECC' Memory uses the available redundant bits > provided by a the parity chips in a way to encode the word into these > available bits, for example: > > 8 bits requires an additional bit for parity, but 5 for ECC > 16 bits requires 2 more for parity, 6 more for ECC > 32 requires 4 more for parity, 7 more for ECC > 64 requires 8 more for parity, 8 more for ECC. > > So manufactures make use of x36 parts to provide 8 redundant bits for > the 64 bits involved, in this case they can make use of ECC, rather > than just parity. Correct me if I'm wrong, so because 72pins SIMMs have a 32bit data path there is no such thing as an ECC SIMM? All the 36 bit wide SIMMS are really just parity, but when two are used together ECC is possible? Thus the MegaRAID 1400 can't be implementing ECC, because they are only using a single SIMM. The only way to do it with a single SIMM would be to have one that is 39 or 40bits wide? Mark Powell - UNIX System Administrator - Clifford Whitworth Building A.I.S., University of Salford, Salford, Manchester, UK. Tel: +44 161 295 5936 Fax: +44 161 295 5888 www.pgp.com for PGP key M.S.Powell@salfrd.ac.uk (spell salford correctly to reply to me) To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-stable" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?Pine.BSF.4.21.0005181119400.55996-100000>