Date: Sat, 11 Oct 2003 13:58:27 +1000 From: Peter Jeremy <peterjeremy@optushome.com.au> To: Andrew Gallatin <gallatin@cs.duke.edu> Cc: freebsd-hackers@freebsd.org Subject: Re: Determining CPU features / cache organization from userland Message-ID: <20031011035827.GD75796@server.c211-28-27-130.belrs2.nsw.optusnet.com.au> In-Reply-To: <16263.1019.939450.708832@grasshopper.cs.duke.edu> References: <20031010103640.6F5A216A4BF@hub.freebsd.org> <20031010134400.GE803@saboteur.dek.spc.org> <16263.1019.939450.708832@grasshopper.cs.duke.edu>
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On Fri, Oct 10, 2003 at 03:09:47PM -0400, Andrew Gallatin wrote: > >Bruce M Simpson writes: > > I've been thinking we should definitely make the cache organization > > info available via sysctl. I am thinking we should do this to make > > the UMA_ALIGN_CACHE definition mean something... > >If you do this, it may make sense to use the same names as MacOSX. > >g51% sysctl hw | grep cache >hw.cachelinesize: 128 >hw.l1icachesize: 65536 >hw.l1dcachesize: 32768 >hw.l2cachesize: 524288 What if your hardware has different linesizes for different caches? Peter
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