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Date:      Mon, 1 Apr 2013 21:46:09 GMT
From:      Robert Watson <rwatson@FreeBSD.org>
To:        Perforce Change Reviews <perforce@FreeBSD.org>
Subject:   PERFORCE change 227296 for review
Message-ID:  <201304012146.r31Lk9JG039127@skunkworks.freebsd.org>

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http://p4web.freebsd.org/@@227296?ac=10

Change 227296 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/04/01 21:46:06

	Link /boot/loader at 128k, rather than at 16k underneath (or
	perhaps on top of) boot2.

Affected files ...

.. //depot/projects/ctsrd/beribsd/src/sys/boot/mips/beri/loader/linker.cfg#2 edit

Differences ...

==== //depot/projects/ctsrd/beribsd/src/sys/boot/mips/beri/loader/linker.cfg#2 (text+ko) ====

@@ -35,26 +35,19 @@
 __mips64_xkphys_cached__ = 0x9800000000000000;	/* Device memory here. */
 
 /*
- * Location of boot2 in flash.
+ * Location of boot file system in flash.
  */
 __cheri_flash_base__ = 0x74000000;
-__cheri_flash_boot_loader_base_ = 0x01f00000;
-__cheri_flash_boot_loader_vaddr__ = __mips64_xkphys_cached__ +
-    __cheri_flash_base__ + __cheri_flash_boot_loader_base_;
-
-/*
- * Location of boot file system in flash.
- */
 __cheri_flash_bootfs_base__ = 0x2000000;
 __cheri_flash_bootfs_len__ = 0x2000000;
 __cheri_flash_bootfs_vaddr__ = __mips64_xkphys_cached__ +
     __cheri_flash_base__ + __cheri_flash_bootfs_base__;
 
 /*
- * Location where boot2 will self-relocate to as its first step.
+ * Location where loader will execute.
  */
-__boot2_base__ = 0x4000;
-__boot2_base_vaddr__ = __mips64_xkphys_cached__ + __boot2_base__;
+__loader_base__ = 0x20000;
+__loader_base_vaddr__ = __mips64_xkphys_cached__ + __loader_base__;
 
 OUTPUT_FORMAT("elf64-tradbigmips");
 OUTPUT_ARCH(mips)
@@ -62,11 +55,11 @@
 SECTIONS
 {
 	/*
-	 * Before entering linked C, boot2 will self-relocate from Intel
+	 * Before entering linked C, loader will self-relocate from Intel
 	 * StrataFlash into DRAM reached via MIPS ckseg0.  We depend on the
 	 * firmware having set up a stack for us.
 	 */
-	. = __boot2_base_vaddr__;
+	. = __loader_base_vaddr__;
 
 	.text ALIGN(0x8): {
 		start.o(.text)
@@ -77,7 +70,7 @@
 
 	__heap = ALIGN(0x8);	/* 64-bit aligned heap pointer */
 	__data_end = .;
-	__boot_loader_len__ = . - __boot2_base_vaddr__;
+	__boot_loader_len__ = . - __loader_base_vaddr__;
 	__bss_start = ADDR(.bss);
 	__bss_end = ALIGN(__bss_start + SIZEOF(.bss), 0x8);
 }



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