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Date:      Fri, 30 Oct 2009 18:08:46 +0000 (UTC)
From:      Robert Noland <rnoland@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r198696 - head/sys/dev/drm
Message-ID:  <200910301808.n9UI8kkn053838@svn.freebsd.org>

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Author: rnoland
Date: Fri Oct 30 18:08:46 2009
New Revision: 198696
URL: http://svn.freebsd.org/changeset/base/198696

Log:
  Cleanup in r600_blit
  
   - Don't bother to assign vb until we know we have enough space
   - Add variables for sx2, sy2, dx2, dy2 so that these aren't
     calculated over and over, also reduce chance of errors.
   - Use switch to assign color/format
  
  MFC after:	3 days

Modified:
  head/sys/dev/drm/r600_blit.c

Modified: head/sys/dev/drm/r600_blit.c
==============================================================================
--- head/sys/dev/drm/r600_blit.c	Fri Oct 30 18:07:22 2009	(r198695)
+++ head/sys/dev/drm/r600_blit.c	Fri Oct 30 18:08:46 2009	(r198696)
@@ -1719,7 +1719,10 @@ r600_blit_copy(struct drm_device *dev,
 	u32 *vb;
 
 	vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
-		      dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
+	    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
+	DRM_DEBUG("src=0x%016llx, dst=0x%016llx, size=%d\n",
+	    (unsigned long long)src_gpu_addr,
+	    (unsigned long long)dst_gpu_addr, size_bytes);
 
 	if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
 		max_bytes = 8192;
@@ -1757,7 +1760,7 @@ r600_blit_copy(struct drm_device *dev,
 					return;
 				set_shaders(dev);
 				vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
-					      dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
+				    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
 			}
 
 			vb[0] = i2f(dst_x);
@@ -1847,7 +1850,7 @@ r600_blit_copy(struct drm_device *dev,
 					return;
 				set_shaders(dev);
 				vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
-					      dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
+				    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
 			}
 
 			vb[0] = i2f(dst_x / 4);
@@ -1913,12 +1916,10 @@ r600_blit_swap(struct drm_device *dev,
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	int cb_format, tex_format;
+	int sx2, sy2, dx2, dy2;
 	u64 vb_addr;
 	u32 *vb;
 
-	vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
-		      dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
-
 	if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
 		dev_priv->blit_vb->used = 0;
 		radeon_cp_discard_buffer(dev, dev_priv->blit_vb);
@@ -1926,20 +1927,14 @@ r600_blit_swap(struct drm_device *dev,
 		if (!dev_priv->blit_vb)
 			return;
 		set_shaders(dev);
-		vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
-			      dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
 	}
+	vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
+	    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
 
-	if (cpp == 4) {
-		cb_format = COLOR_8_8_8_8;
-		tex_format = FMT_8_8_8_8;
-	} else if (cpp == 2) {
-		cb_format = COLOR_5_6_5;
-		tex_format = FMT_5_6_5;
-	} else {
-		cb_format = COLOR_8;
-		tex_format = FMT_8;
-	}
+	sx2 = sx + w;
+	sy2 = sy + h;
+	dx2 = dx + w;
+	dy2 = dy + h;
 
 	vb[0] = i2f(dx);
 	vb[1] = i2f(dy);
@@ -1947,31 +1942,46 @@ r600_blit_swap(struct drm_device *dev,
 	vb[3] = i2f(sy);
 
 	vb[4] = i2f(dx);
-	vb[5] = i2f(dy + h);
+	vb[5] = i2f(dy2);
 	vb[6] = i2f(sx);
-	vb[7] = i2f(sy + h);
+	vb[7] = i2f(sy2);
+
+	vb[8] = i2f(dx2);
+	vb[9] = i2f(dy2);
+	vb[10] = i2f(sx2);
+	vb[11] = i2f(sy2);
 
-	vb[8] = i2f(dx + w);
-	vb[9] = i2f(dy + h);
-	vb[10] = i2f(sx + w);
-	vb[11] = i2f(sy + h);
+	switch(cpp) {
+	case 4:
+		cb_format = COLOR_8_8_8_8;
+		tex_format = FMT_8_8_8_8;
+		break;
+	case 2:
+		cb_format = COLOR_5_6_5;
+		tex_format = FMT_5_6_5;
+		break;
+	default:
+		cb_format = COLOR_8;
+		tex_format = FMT_8;
+		break;
+	}
 
 	/* src */
 	set_tex_resource(dev_priv, tex_format,
 			 src_pitch / cpp,
-			 sy + h, src_pitch / cpp,
+			 sy2, src_pitch / cpp,
 			 src_gpu_addr);
 
 	cp_set_surface_sync(dev_priv,
-			    R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr);
+			    R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr);
 
 	/* dst */
 	set_render_target(dev_priv, cb_format,
-			  dst_pitch / cpp, dy + h,
+			  dst_pitch / cpp, dy2,
 			  dst_gpu_addr);
 
 	/* scissors */
-	set_scissors(dev_priv, dx, dy, dx + w, dy + h);
+	set_scissors(dev_priv, dx, dy, dx2, dy2);
 
 	/* Vertex buffer setup */
 	vb_addr = dev_priv->gart_buffers_offset +
@@ -1984,7 +1994,7 @@ r600_blit_swap(struct drm_device *dev,
 
 	cp_set_surface_sync(dev_priv,
 			    R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
-			    dst_pitch * (dy + h), dst_gpu_addr);
+			    dst_pitch * dy2, dst_gpu_addr);
 
 	dev_priv->blit_vb->used += 12 * 4;
 }



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