Date: Thu, 29 Jun 2000 16:10:47 +0800 From: Trent Nelson <tpnelson@student.cowan.edu.au> To: John Polstra <jdp@polstra.com> Cc: alpha@freebsd.org Subject: Re: Cache line size for the Alpha Message-ID: <395B0487.9D94D2A8@student.cowan.edu.au> References: <XFMail.000628213509.jdp@polstra.com> <395A0EE8.28E6C524@student.cowan.edu.au> <200006291628.JAA23243@vashon.polstra.com>
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John Polstra wrote:
> Now does anybody know whether it makes a difference performance-wise
> to put spinlocks in separate cache lines on the Alpha? I understand
> that it makes a big difference on the x86. But one person told me in
> private mail that he didn't think it mattered on the Alpha.
From the Alpha Architecture Handbook, v4.0, Appendix A.3:
"Software locks are aligned quadwords and should be allocated
to large cache blocks that either contain no other data or
read-mostly data whose usage is correlated with the lock."
[Pg. 279-280]
From what I've read, I think the biggest performance consideration is
the locality of the resource in contention. For high contention locks,
it seems desirable to ensure that the spinlock code and the resource in
contention are placed on separate 128-byte cache block boundaries. For
locks with very low contention, where possible, it may be desirable to
keep the resource in contention in the same line as the spinlock code.
Appendix A.3.2 of the Alpha Architecture Handbook v4.0 deals with
software locking implementations. Appendix C of the Compiler Writers'
Guide to the 21264 deals with implementing optimal quadword aligned code
for a tight loop.
Both these and more can be retrieved from:
ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
Hope this helps.
> John
Regards,
Trent.
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