Date: Thu, 06 Nov 1997 19:58:39 GMT From: mouth@ibm.net (John Kelly) To: hackers@FreeBSD.ORG Subject: Re: Startech 16650 Message-ID: <34631964.250751244@smtp-gw01.ny.us.ibm.net> In-Reply-To: <Pine.BSF.3.95.971106100743.4264A-100000@harlie.bfd.com> References: <Pine.BSF.3.95.971106100743.4264A-100000@harlie.bfd.com>
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On Thu, 6 Nov 1997 10:09:40 -0800 (PST), "Eric J. Schwertfeger" <ejs@bfd.com> wrote: >> >No, 16650's run the port at 4x whatever speed you set it to. >> >> Only if using a 7.3728 MHz clock. But if using the typical 1.8432 MHz >> clock found on older serial adapters you will get the usual 1x speeds. > >Actually, I think the 16650 has a software flag to quadruple the baud >rate NO. This is a good example of UART confusion. On a 16650, by default MCR bit 7 is "0" and in this state the 650 UART will set the baud rate according to the input clock (in MHz) divided first by the two-byte value contained in the divisor latch MSB and LSB, and then further divided by 16. Take for example: a 16650 UART with a 7.3728 MHz clock, and the value 1 in the divisor latch. Divide 7,372,800 by 1 and then by 16; the answer is 460,800 which is the *maximum* baud rate for the 650 with a 7.3728 MHz clock. However, the maximum baud rate of 460,800 can be lowered by increasing the divisor latch to values above 1. For instance, 192 (decimal) gives a baud rate of 2400, at least in the case where a 7.3728 MHz clock is used. While MCR bit 7 remains undisturbed at its default value of "0" it may *seem* like there is a "software flag to quadruple the baud rate" but the higher baud rate actually results from the higher clock input of the 7.3728 MHz clock, not the effect of MCR bit 7. The effect of setting MCR bit 7 to "1" is exactly the opposite; it further divides the baud rate by 4 to maintain compatibility with older 550 software when the higher 7.3728 clock is used. John
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