Date: Sat, 4 Jan 2014 00:51:59 +0400 From: Oleg Bulyzhin <oleg@freebsd.org> To: freebsd-hackers@freebsd.org Subject: atomic_load_acq @ i386/amd64 Message-ID: <20140103205159.GA99722@lath.rinet.ru>
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Hello. I've got a question: why atomic_load_acq_* implemented on i386/amd64 archs with locked cmpxchg instruction? Comment about this (in /sys/(amd64|i386)/include/atomic.h) looks wrong for me. I believe acquire/release semantics does not require StoreLoad barrier so simple aligned load should be enough. (because acquire/release semantics does not guarantee sequential consistency). -- Oleg. ================================================================ === Oleg Bulyzhin -- OBUL-RIPN -- OBUL-RIPE -- oleg@rinet.ru === ================================================================
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