Date: Thu, 26 Jul 2001 20:36:59 -0400 From: Jake Burkholder <jake@k7.locore.ca> To: Arun Sharma <arun@sharmas.dhs.org> Cc: John Baldwin <jhb@FreeBSD.ORG>, hackers@FreeBSD.ORG Subject: Re: Need a clean room implementation of this function Message-ID: <200107270036.f6R0ax916080@k7.locore.ca> In-Reply-To: Message from Arun Sharma <arun@sharmas.dhs.org> of "Thu, 26 Jul 2001 16:22:26 PDT." <20010726162226.A23558@sharmas.dhs.org>
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> On Thu, Jul 26, 2001 at 03:49:58PM -0700, John Baldwin wrote:
> > > That does set, not test-and-set. What I want is exactly what the Intel
> > > BTS instruction does: atomically test and set a bit.
> >
> > Unfortunately that is very ia32 specific. The code would be more
> > friendly on alpha and ia64 at least if the algo was changed to use
> > cmpset on a word instead of test-and-set of a bit.
>
> Another way to look at it is as an IA-32 specific optimization. For
> other architectures, we could just use the code you posted earlier.
>
If I wasn't going to use a non-blocking synchronization loop, this
is how I'd do it.
static __inline int
test_and_set_bit(int nr, volatile void *addr)
{
char c;
__asm __volatile("lock ; bts %2, %1 ; setc %0"
: "=br" (c) : "m" (*(volatile int *)addr), "r" (nr));
return (c != 0);
}
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