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Date:      Sat, 01 Jul 2000 22:07:41 +0800
From:      Trent Nelson <tpnelson@student.cowan.edu.au>
To:        John Polstra <jdp@polstra.com>
Cc:        alpha@FreeBSD.ORG
Subject:   Re: Cache line size for the Alpha
Message-ID:  <395DFB2D.4D2139C7@student.cowan.edu.au>
References:  <XFMail.000628213509.jdp@polstra.com> <395A0EE8.28E6C524@student.cowan.edu.au> <200006291628.JAA23243@vashon.polstra.com> <395B0487.9D94D2A8@student.cowan.edu.au> <200006301717.KAA25927@vashon.polstra.com>

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John Polstra wrote:
> 
> In article <395B0487.9D94D2A8@student.cowan.edu.au>,
> Trent Nelson  <tpnelson@echidna.stu.cowan.edu.au> wrote:

> >       From what I've read, I think the biggest performance
> > consideration is the locality of the resource in contention. For
> > high contention locks, it seems desirable to ensure that the
> > spinlock code and the resource in contention are placed on separate
> > 128-byte cache block boundaries.
> 
> The 128-byte figure confuses me.  I thought the biggest cache line
> size you mentioned before was 64 bytes.  Is a cache "block" different
> from a cache line?

	The 128-byte figure simply derives from Compaq's encouragement for
Software Developers to "over-align" code in anticipation of future Alpha
implementations with a 128-bit wide data bus. Effectively, in these
environments, code that is octaword aligned will be given a higher
execution priority in the pipeline than quadword aligned code.

	Aligning code to 128-byte boundaries will have no performance
advantages in current Alpha implementations. That said, it will also
incur no performance penalties and will be advantageous in later Alpha
architectures.

	Otherwise, quadword alignment is fine. Your call.

	On a separate note, would it be possible to take a look at the code
when you're finished? I don't have access to an Alpha so it makes it a
little hard to keep track of the source in this particular branch.
 
> John

	Regards,

		Trent.


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