Date: Wed, 26 Sep 2007 20:10:36 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/sparc64/pci ofw_pcibus.c Message-ID: <200709262010.l8QKAa3L069348@repoman.freebsd.org>
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marius 2007-09-26 20:10:36 UTC
FreeBSD src repository
Modified files:
sys/sparc64/pci ofw_pcibus.c
Log:
- Use the actual clock frequency of the PCI bus instead of assuming
33MHz for calculating the latency timer values for its children.
Inspired by NetBSD doing the same and Linux as well as OpenSolaris
using a similar approach.
While at it rename a variable and change its type to be more
appropriate fuer values of PCI properties so the variable can be
more easily reused.
- Initialize the cache line size register of PCI devices to a
legal value; the cache line size is limited to 64 bytes by the
Fireplane/Safari, JBus and UPA interconnection busses. Setting
it to an unsupported value caused bad performance at least with
GEM as it causes them to not do cache line bursts and to not
issue cache line commands on the PCI bus.
Approved by: re (kensmith)
MFC after: 1 week
Revision Changes Path
1.15 +16 -17 src/sys/sparc64/pci/ofw_pcibus.c
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