Date: Sun, 26 Oct 1997 07:53:37 +0100 From: sthaug@nethelp.no To: wghhicks@ix.netcom.com Cc: freebsd-hackers@FreeBSD.ORG Subject: Re: Parity Ram Message-ID: <26797.877848817@verdi.nethelp.no> In-Reply-To: Your message of "Sat, 25 Oct 1997 18:12:50 -0400" References: <34526EE2.64DE0BA6@ix.netcom.com>
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> i understand the way ECC works, the minicomputer systems i've worked > with in days past held 3 bits for every 8. Just wondering what parity > RAM *really* means (these daze). > > WRT the reason parity could be worse, most of the schemes i'm familiar > with use only a single bit per eight bit quantity. Parity bits can be > bad too, that is why most ECC schemes are considered superior (to me > anyway). Hardware based on the Intel 430HX and 440FX chipsets (probably 440LX also) can use a single parity bit per byte to get you ECC. The trick is that memory is read and written in units of 64 bits (ie. 72 bits with the parity info). 72 bits per 64 bit of information is enough to get you single bit correction and double bit detection. Steinar Haug, Nethelp consulting, sthaug@nethelp.no
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