Date: Fri, 23 Aug 2002 14:54:59 -0700 (PDT) From: John Polstra <jdp@polstra.com> To: current@freebsd.org Cc: phk@critter.freebsd.dk Subject: Re: how to compute the skew between TSC in SMP systems ? Message-ID: <200208232154.g7NLsxsi088258@vashon.polstra.com> In-Reply-To: <30560.1030138677@critter.freebsd.dk> References: <30560.1030138677@critter.freebsd.dk>
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In article <30560.1030138677@critter.freebsd.dk>, Poul-Henning Kamp <phk@critter.freebsd.dk> wrote: > In message <200208232135.g7NLZZqx088123@vashon.polstra.com>, John Polstra write > s: > > Still, the feature has come in handy when debugging certain > >multiprocessor situations where I really needed to know the relative > >ordering of events taking place on both CPUs. > > Right, you might get away with that in tightly controlled circumstances, > but it would probably be far smarter to use the counter in the > IOAPIC (exists on all SMP) You mean the timer in the local APIC, don't you? I don't recall that the IOAPIC has one, and if it did it would probably be somewhat expensive to read it. > or the ACPI counter even in such cases. The trouble with both of those counters is that they don't give you the 1-CPU-cycle resolution that you get with the TSC. For some kinds of performance evaluation you really want to be able to count CPU cycles. John -- John Polstra John D. Polstra & Co., Inc. Seattle, Washington USA "Disappointment is a good sign of basic intelligence." -- Chögyam Trungpa To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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