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Date:      Tue, 19 May 2009 22:34:12 +0100
From:      Wenqi Chen <cwenqi@gmail.com>
To:        Mark Tinguely <tinguely@casselton.net>
Cc:        freebsd-arm@freebsd.org
Subject:   Re: crosscompiler and porting notes
Message-ID:  <c9a286a60905191434q24ce39a8x7c76df5dd1191cb7@mail.gmail.com>
In-Reply-To: <c9a286a60905191433xbf1bfd3i653562b99e17f87d@mail.gmail.com>
References:  <4A12D46B.8040808@telenix.org> <200905192100.n4JL0qNx079696@casselton.net> <c9a286a60905191433xbf1bfd3i653562b99e17f87d@mail.gmail.com>

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forgot to mention the compiler revision: codesourcery arm2008q3



2009/5/19 Wenqi Chen <cwenqi@gmail.com>:
> codesourcery revison of GCC-4.3 does seem to support armv7-a compiler
> flag/NEON instruction set.
>
> 2009/5/19 Mark Tinguely <tinguely@casselton.net>:
>>
>> sorry for the blank reply. It should have said
>>
>> Looking at the current sources for the GNU assembler, it appears to me t=
hat
>> the "gas" sources do not have some new and important ARMv7 commands such=
 as
>> "dmb", "dsb", and "isb" (barriers). There ARMv6 equivalent command, but
>> are not recommended.
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0---
>> I looked at the Cortex document, the first thing that changed in ARMv7
>> is the information registers (for example information on the caches).
>> You will need to replace the CPU information and intialization code.
>>
>> It would be nice to get an ARMv7 ARM. Someone with authority, like the
>> FreeBSD Foundation may be needed.
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0---
>> You will need to write a new cpufunc_asm_XXX.S file of routines. The
>> existing routines assume the pmap will flush the caches on context chang=
e.
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0---
>> I would suggest you start by using the existing memory model of flushing
>> caches on context changes until we learn more on the Cortex cache - are =
they
>> *really* not effected by the cache coloring problem.
>>
>> If you can get the console working, and are willing to put some test
>> code into somewhere like pmap_bootstrap(), to test if the cache coloring
>> is really fixed, I would write it up.
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0---
>> I have some rough code for the new ARMv6/ARMv7 TLS registers, the tlb AS=
ID
>> and load and store exclusive. You have plenty to do to get the board up
>> to single user, without having to worry about this other stuff.
>>
>> --Mark.
>> _______________________________________________
>> freebsd-arm@freebsd.org mailing list
>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm
>> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"
>>
>
>
>
> --
> WC
>



--=20
WC



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