Date: Sat, 24 Aug 1996 08:25:01 +0200 (MET DST) From: J Wunsch <j@uriah.heep.sax.de> To: freebsd-hackers@freebsd.org (FreeBSD hackers) Cc: brianc@pobox.com Subject: Re: Triton II chipsets Message-ID: <199608240625.IAA08864@uriah.heep.sax.de> In-Reply-To: <199608240138.VAA00256@ottawa.net> from Brian Campbell at "Aug 23, 96 09:38:01 pm"
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As Brian Campbell wrote: > I'm running on a Triton II VX chipset and wanted the chipset probe to > recognize and display my chipset. Something like this? uriah /kernel: chip0 <Intel 82439HX (Triton II) PCI cache memory controller> rev 1 on pci0:0 uriah /kernel: DRAM ECC/Parity: ECC, ECC Test disabled, uriah /kernel: Shutdown to Port 92 disabled, Dual Processor NA# disabled, uriah /kernel: Peer Concurrency enabled, SERR# Output Type: Open drain output, uriah /kernel: Global TXC enabled uriah /kernel: Cache: 512K dual-bank pipelined-burst, NA Disable: disabled, uriah /kernel: Extended Cacheability disabled, SCFMI disabled, L1 enabled uriah /kernel: Speculative Leadoff disabled, Turn-around Insertion disabled, uriah /kernel: Memory Address Drive Strength: 8mA/8mA, 64 Mbit mode disabled uriah /kernel: Hole: None, EDO Detect mode disabled, uriah /kernel: DRAM Refrest Rate 66Mhz uriah /kernel: Turbo Read Leadoff disabled, uriah /kernel: DRAM Read Burst Timing: x-3-3-3/x-4-4-4, uriah /kernel: DRAM Write Burst Timing: x-3-3-3, uriah /kernel: Fast RAS to CAS Delay: 3 clocks, uriah /kernel: DRAM leadoff Timing: Read 7, Write 6, Precharge 4, Refresh 5 uriah /kernel: chip1 <Intel 82371SB (Triton II) PCI-ISA bridge> rev 0 on pci0:7:0 uriah /kernel: DMA Reserved Page Register Aliasing disabled uriah /kernel: 8-Bit I/O Recovery: disabled uriah /kernel: I/O Recovery Timing: 8-bit 3.5 clocks, 16-bit 3.5 clocks uriah /kernel: APIC Chip Select: disabled uriah /kernel: Extended BIOS: disabled uriah /kernel: Lower BIOS: enabled uriah /kernel: Coprocessor IRQ13: enabled uriah /kernel: Mouse IRQ12: disabled uriah /kernel: BIOSCS# Write Protect: disabled uriah /kernel: Keyboard Controller Address Location: enabled uriah /kernel: RTC Address Location: enabled uriah /kernel: Interrupt Routing: A: IRQ11, B: IRQ10, C: IRQ12, D: disabled uriah /kernel: MB0: disabled, MB1: The patch has been posted to -hackers (or -current, i eventually forgot) some days ago, but i haven't heard anything back. If the author is happy with it now, we can commit it to the sources. -- cheers, J"org joerg_wunsch@uriah.heep.sax.de -- http://www.sax.de/~joerg/ -- NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-)
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