Date: Sat, 23 Sep 2006 15:10:07 -0400 (EDT) From: Gardner Bell <gbell72@rogers.com> To: freebsd-arm@freebsd.org Subject: ks8695_reg.h Message-ID: <20060923191007.36367.qmail@web88012.mail.re2.yahoo.com>
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Hello everyone, I'm presently working on the KS8695 registers header file and am curious what I should and should not include in this file. At the moment I have included almost every register that the data sheets mention. Is this a good idea, or should I make separate header files for things like the UART and memory controller registers? I've included a copy of what I have done so far. Any help and or recommendations you can offer, particularly on my naming conventions is most welcome. Thanks Gardner /* Kendin KS8695 - ARM922T based processor * * Reference: * KS8695X Data Sheet. * KS8695X Migration Guide. * * * Upon power up, the KS8695(X) memory map is configured as shown below: * * 0x03FF0000-0x03FFFFFF - 64KB System Configuration Register Space * 0x02000000-0x03FEFFFF - 32MB Not Configured * 0x00000000-0x01FFFFFF - 32MB Flash Bank 0 */ #ifndef _KS8695_REG_H_ #define _KS8695_REG_H_ /* UART Registers */ #define KS8695_UART_RX 0x00 #define KS8695_UART_TX 0x04 #define KS8695_UART_FCR 0x08 /* FIFO control */ #define KS8695_UART_LCR 0x0c /* Line control */ #define KS8695_UART_MCR 0x10 /* Modem control */ #define KS8695_UART_LSR 0x14 /* Line status */ #define KS8695_UART_MSR 0x18 /* Modem status */ #define KS8695_UART_BD 0x1c /* Baud rate divisor */ #define KS8695_UART_SR 0x20 /* Status register */ /* Interrupt controller registers */ #define KS8695_INT_MC 0x00 /* Mode control - reserve bit 23:18 on KS8695X */ #define KS8695_INT_ER 0x04 /* INT enable - reserve bit 23:18 on KS8695X */ #define KS8695_INT_SR 0x08 /* INT status - reserve bit 23:18 on KS8695X */ #define KS8695_EMAC_PR 0x10 /* EMAC priority register - removed on KS8695X */ #define KS8695_WAN_PR 0x0C /* INT priority for WAN MAC */ #define KS8695_LAN_PR 0x14 /* INT priority register for LAN MAC */ #define KS8695_TIMER_PR 0x18 /* INT priority register for Timer */ #define KS8695_UART_PR 0x1C /* UART priority register */ /* Timer */ #define KS8695_TMR_CR 0x00 /* Timer control register */ #define KS8695_TMR_TC1 0x04 /* Timer 1 timeout count register */ #define KS8695_TMR_TC0 0x08 /* Timer 0 timeout count register */ #define KS8695_TMR_PC1 0x0C /* Timer 1 pulse count register */ #define KS8695_TMR_PC0 0x10 /* Timer 0 pulse count register */ /* GPIO Registers*/ #define KS8695_PMR 0x00 /* I/O port mode register */ #define KS8695_PCR 0x04 /* I/O port control register */ #define KS8695_PDR 0x08 /* I/O port data register */
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