Date: Sun, 19 Oct 2008 03:20:16 GMT From: Andrew Turner <andrew@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 151539 for review Message-ID: <200810190320.m9J3KGJg009662@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=151539 Change 151539 by andrew@andrew_bender on 2008/10/19 03:19:19 Add the s3c2410 MMC/SD registers in preparation for a read only MMC driver Affected files ... .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#4 edit Differences ... ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#4 (text+ko) ==== @@ -204,7 +204,48 @@ #define EXTINTR_BOTH 0x06 /* SD interface */ -/* XXX */ +#define SDI_CON 0x00 +#define SDI_PRE 0x04 +#define SDI_CARG 0x08 +#define SDI_CCON 0x0c +#define CCON_ABORDCMD (1<<12) /* Abort SDIO CMD12/52 */ +#define CCON_WITHDATA (1<<11) /* CMD with data */ +#define CCON_LONGRSP (1<<10) /* 136 bit response */ +#define CCON_WAITRSP (1<<9) /* Host waits for response */ +#define CCON_CMD_START (1<<8) +#define CCON_CMDINDEX_MASK (0x7F) /* Command number index */ +#define SDI_CSTA 0x10 +#define CSTA_RSPFAIL (1<<12) +#define CSTA_CMDSENT (1<<11) +#define CSTA_CMDTOUT (1<<10) +#define CSTA_RSPFIN (1<<9) +#define CSTA_CMDON (1<<8) +#define SDI_RSP0 0x14 +#define SDI_RSP1 0x18 +#define SDI_RSP2 0x1c +#define SDI_RSP3 0x20 +#define SDI_DTIMER 0x24 +#define SDI_BSIZE 0x28 +#define SDI_DCON 0x2c +#define DCON_PRDTYPE (1<<21) +#define DCON_TARSP (1<<20) /* Transmit after response */ +#define DCON_RACMD (1<<19) /* Receive after command */ +#define DCON_BACMD (1<<18) /* Busy after command */ +#define DCON_BLKMODE (1<<17) /* Stream/Block mode */ +#define DCON_WIDEBUS (1<<16) /* Standard/Wide bus */ +#define DCON_ENDMA (1<<15) /* DMA Enable */ +#define DCON_STOP (1<<14) /* Force the transfer to stop */ +/* Determine the direction of the data transfer */ +#define DCON_DATA_READY (0<<12) /* No transfer */ +#define DCON_ONLYBUST (1<<12) /* Check if busy */ +#define DCON_DATA_RECEIVE (2<<12) /* Receive data from SD */ +#define DCON_DATA_TRANSMIT (3<<12) /* Send data to SD */ +#define DCON_BLKNUM_MASK (0x7FF) /* Block number */ +#define SDI_DCNT 0x30 +#define SDI_DSTA 0x34 +#define SDI_FSTA 0x38 +#define SDI_DAT 0x3c +#define SDI_IMSK 0x40 /* Interrupt mask */ /* ADC */ /* XXX: ADCCON register is common to both S3C2410 and S3C2400,
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