Date: Sat, 1 Apr 2017 17:00:10 -0700 From: Adrian Chadd <adrian.chadd@gmail.com> To: Marcin Wojtas <mw@semihalf.com> Cc: "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org> Subject: Re: Coherent bus_dma for ARMv7 Message-ID: <CAJ-Vmo=UC9K3e0TJGU86JZ6npzRevjpC3UEwgWrrh9mjCELKMg@mail.gmail.com> In-Reply-To: <CAPv3WKcG_Y=5zPk-2vGbQfCpiNcWvuUymY8EHRnWsM2FUzcG4Q@mail.gmail.com> References: <CAPv3WKejupH4JG1=_XV6PknnKifxbF0qoVubtMRVtZWEoBZ7xg@mail.gmail.com> <CAPv3WKcG_Y=5zPk-2vGbQfCpiNcWvuUymY8EHRnWsM2FUzcG4Q@mail.gmail.com>
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hiya, so why's this need to be different? can't it somehow be merged with the existing busdma code? -adrian On 31 March 2017 at 07:05, Marcin Wojtas <mw@semihalf.com> wrote: > Patch with the coherent bus_dma support attached. > > Marcin > > 2017-03-31 16:01 GMT+02:00 Marcin Wojtas <mw@semihalf.com>: >> Hi, >> >> In current FreeBSD-HEAD ARMv7 platforms, which support hardware IO >> cache coherency cannot make use of this feature. In our project we >> implemented coherent variant bus_dma, which is basing on x86 and arm64 >> approach. Using of above solution is not obligatory and depends on >> setting newly added option for that purpose. >> >> Needless to say, our platform (Marvell Armada 38x) IO performance >> boosted after switching to it. Do you wish to enable such option in >> HEAD? >> >> Regards, >> Marcin > > _______________________________________________ > freebsd-arm@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"
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