Date: Sun, 8 Feb 2015 20:44:51 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r278400 - in stable/9/sys/dev: bge pci Message-ID: <201502082044.t18KipmR092371@svn.freebsd.org>
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Author: marius Date: Sun Feb 8 20:44:50 2015 New Revision: 278400 URL: https://svnweb.freebsd.org/changeset/base/278400 Log: MFC: r276299 - Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device for the lookup. - For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS is cleared when using MSI/MSI-X. - Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4). Modified: stable/9/sys/dev/bge/if_bge.c stable/9/sys/dev/pci/pci.c Directory Properties: stable/9/sys/ (props changed) stable/9/sys/dev/ (props changed) Modified: stable/9/sys/dev/bge/if_bge.c ============================================================================== --- stable/9/sys/dev/bge/if_bge.c Sun Feb 8 20:44:44 2015 (r278399) +++ stable/9/sys/dev/bge/if_bge.c Sun Feb 8 20:44:50 2015 (r278400) @@ -1937,11 +1937,9 @@ bge_chipinit(struct bge_softc *sc) /* * Disable memory write invalidate. Apparently it is not supported - * properly by these devices. Also ensure that INTx isn't disabled, - * as these chips need it even when using MSI. + * properly by these devices. */ - PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, - PCIM_CMD_INTxDIS | PCIM_CMD_MWIEN, 4); + PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4); /* Set the timer prescaler (always 66 MHz). */ CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ); Modified: stable/9/sys/dev/pci/pci.c ============================================================================== --- stable/9/sys/dev/pci/pci.c Sun Feb 8 20:44:44 2015 (r278399) +++ stable/9/sys/dev/pci/pci.c Sun Feb 8 20:44:50 2015 (r278400) @@ -270,7 +270,7 @@ static const struct pci_quirk pci_quirks { 0x43851002, PCI_QUIRK_UNMAP_REG, 0x14, 0 }, /* - * Atheros AR8161/AR8162/E2200 ethernet controller has a bug that + * Atheros AR8161/AR8162/E2200 Ethernet controllers have a bug that * MSI interrupt does not assert if PCIM_CMD_INTxDIS bit of the * command register is set. */ @@ -278,6 +278,17 @@ static const struct pci_quirk pci_quirks { 0xE0911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, { 0x10901969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, + /* + * Broadcom BCM5714(S)/BCM5715(S)/BCM5780(S) Ethernet MACs don't + * issue MSI interrupts with PCIM_CMD_INTxDIS set either. + */ + { 0x166814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714 */ + { 0x166914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714S */ + { 0x166a14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780 */ + { 0x166b14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780S */ + { 0x167814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715 */ + { 0x167914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715S */ + { 0 } }; @@ -3567,14 +3578,16 @@ pci_setup_intr(device_t dev, device_t ch mte->mte_handlers++; } - if (!pci_has_quirk(pci_get_devid(dev), - PCI_QUIRK_MSI_INTX_BUG)) { - /* - * Make sure that INTx is disabled if we are - * using MSI/MSIX - */ + /* + * Make sure that INTx is disabled if we are using MSI/MSI-X, + * unless the device is affected by PCI_QUIRK_MSI_INTX_BUG, + * in which case we "enable" INTx so MSI/MSI-X actually works. + */ + if (!pci_has_quirk(pci_get_devid(child), + PCI_QUIRK_MSI_INTX_BUG)) pci_set_command_bit(dev, child, PCIM_CMD_INTxDIS); - } + else + pci_clear_command_bit(dev, child, PCIM_CMD_INTxDIS); bad: if (error) { (void)bus_generic_teardown_intr(dev, child, irq,
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