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Date:      Tue, 29 Jun 1999 00:57:48 +0000 (GMT)
From:      Terry Lambert <tlambert@primenet.com>
To:        julian@whistle.com (Julian Elischer)
Cc:        dillon@apollo.backplane.com, peter@netplex.com.au, alc@cs.rice.edu, tlambert@primenet.com, bakul@torrentnet.com, freebsd-smp@freebsd.org
Subject:   Re: high-efficiency SMP locks - submission for review
Message-ID:  <199906290057.RAA07616@usr05.primenet.com>
In-Reply-To: <Pine.BSF.3.95.990628091426.10211B-100000@current1.whistle.com> from "Julian Elischer" at Jun 28, 99 09:16:44 am

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> I'd say that we probably wouldn't support SMP on 386 and 486 processors..
> and in UP those locks that need atomicity would be optimised  away.
> 
> We WILL need locking in UP when we move to kernel threads, but that
> doesn't require bus atomicity.

No one is currently bothering with anything but the Intel MESI
coherency model for SMP, anyway, so I don't understand the
relevence of bus coherency to the argument.

My only point is that the code needs to degrade gracefully (e.g.
without rebuilding your kernel with a magic doohickey flipped on
or off for no obvious reason).


					Terry Lambert
					terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.


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