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Date:      Fri, 19 May 2017 08:25:40 +0000 (UTC)
From:      Wojciech Macek <wma@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r318525 - head/sys/arm/mv
Message-ID:  <201705190825.v4J8Peic007359@repo.freebsd.org>

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Author: wma
Date: Fri May 19 08:25:40 2017
New Revision: 318525
URL: https://svnweb.freebsd.org/changeset/base/318525

Log:
  Fix MPIC mask/unmask
  
  Before the fix for single interrupt, both percpu and non-percpu routes
  were enabled/disable at the same time.
  
  Submitted by:  Marcin Wojtas <mw@semihalf.com
  Obtained from: Semihalf
  Sponsored by:  Stormshield, Netgate
  Reviewed by:   loos
  Differential revision: https://reviews.freebsd.org/D10716

Modified:
  head/sys/arm/mv/mpic.c

Modified: head/sys/arm/mv/mpic.c
==============================================================================
--- head/sys/arm/mv/mpic.c	Fri May 19 08:24:23 2017	(r318524)
+++ head/sys/arm/mv/mpic.c	Fri May 19 08:25:40 2017	(r318525)
@@ -148,6 +148,7 @@ static void	mpic_unmask_irq(uintptr_t nb
 static void	mpic_mask_irq(uintptr_t nb);
 static void	mpic_mask_irq_err(uintptr_t nb);
 static void	mpic_unmask_irq_err(uintptr_t nb);
+static boolean_t mpic_irq_is_percpu(uintptr_t);
 #ifdef INTRNG
 static int	mpic_intr(void *arg);
 #endif
@@ -474,14 +475,24 @@ mpic_mask_irq_err(uintptr_t nb)
 	MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ERR_MASK, mask);
 }
 
+static boolean_t
+mpic_irq_is_percpu(uintptr_t nb)
+{
+	if (nb < MPIC_PPI)
+		return TRUE;
+
+	return FALSE;
+}
+
 static void
 mpic_unmask_irq(uintptr_t nb)
 {
 
-	if (nb < ERR_IRQ) {
-		MPIC_WRITE(mv_mpic_sc, MPIC_ISE, nb);
+	if (mpic_irq_is_percpu(nb))
 		MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ICM, nb);
-	} else if (nb < MSI_IRQ)
+	else if (nb < ERR_IRQ)
+		MPIC_WRITE(mv_mpic_sc, MPIC_ISE, nb);
+	else if (nb < MSI_IRQ)
 		mpic_unmask_irq_err(nb);
 
 	if (nb == 0)
@@ -492,10 +503,11 @@ static void
 mpic_mask_irq(uintptr_t nb)
 {
 
-	if (nb < ERR_IRQ) {
-		MPIC_WRITE(mv_mpic_sc, MPIC_ICE, nb);
+	if (mpic_irq_is_percpu(nb))
 		MPIC_CPU_WRITE(mv_mpic_sc, MPIC_ISM, nb);
-	} else if (nb < MSI_IRQ)
+	else if (nb < ERR_IRQ)
+		MPIC_WRITE(mv_mpic_sc, MPIC_ICE, nb);
+	else if (nb < MSI_IRQ)
 		mpic_mask_irq_err(nb);
 }
 



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