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Date:      Sat, 20 Mar 2010 22:20:03 GMT
From:      dfilter@FreeBSD.ORG (dfilter service)
To:        freebsd-sparc64@FreeBSD.org
Subject:   Re: sparc64/144900: commit references a PR
Message-ID:  <201003202220.o2KMK3I3039228@freefall.freebsd.org>

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The following reply was made to PR sparc64/144900; it has been noted by GNATS.

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: sparc64/144900: commit references a PR
Date: Sat, 20 Mar 2010 22:12:24 +0000 (UTC)

 Author: marius
 Date: Sat Mar 20 22:12:15 2010
 New Revision: 205396
 URL: http://svn.freebsd.org/changeset/base/205396
 
 Log:
   Division should take both arguments' signs into account when the
   the dividend is infinity or zero and the divisor is not the same.
   
   PR:		144900
   Submitted by:	Peter Jeremy
   MFC after:	3 days
 
 Modified:
   head/lib/libc/sparc64/fpu/fpu_div.c
 
 Modified: head/lib/libc/sparc64/fpu/fpu_div.c
 ==============================================================================
 --- head/lib/libc/sparc64/fpu/fpu_div.c	Sat Mar 20 21:27:44 2010	(r205395)
 +++ head/lib/libc/sparc64/fpu/fpu_div.c	Sat Mar 20 22:12:15 2010	(r205396)
 @@ -167,14 +167,16 @@ __fpu_div(fe)
  	 * return it.  Otherwise we have the following cases:
  	 *
  	 *	Inf / Inf = NaN, plus NV exception
 -	 *	Inf / num = Inf [i.e., return x]
 -	 *	Inf / 0   = Inf [i.e., return x]
 -	 *	0 / Inf = 0 [i.e., return x]
 -	 *	0 / num = 0 [i.e., return x]
 +	 *	Inf / num = Inf [i.e., return x #]
 +	 *	Inf / 0   = Inf [i.e., return x #]
 +	 *	0 / Inf = 0 [i.e., return x #]
 +	 *	0 / num = 0 [i.e., return x #]
  	 *	0 / 0   = NaN, plus NV exception
 -	 *	num / Inf = 0
 +	 *	num / Inf = 0 #
  	 *	num / num = num (do the divide)
 -	 *	num / 0   = Inf, plus DZ exception
 +	 *	num / 0   = Inf #, plus DZ exception
 +	 *
 +	 * # Sign of result is XOR of operand signs.
  	 */
  	if (ISNAN(x) || ISNAN(y)) {
  		ORDER(x, y);
 @@ -183,10 +185,10 @@ __fpu_div(fe)
  	if (ISINF(x) || ISZERO(x)) {
  		if (x->fp_class == y->fp_class)
  			return (__fpu_newnan(fe));
 +		x->fp_sign ^= y->fp_sign;
  		return (x);
  	}
  
 -	/* all results at this point use XOR of operand signs */
  	x->fp_sign ^= y->fp_sign;
  	if (ISINF(y)) {
  		x->fp_class = FPC_ZERO;
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