Date: Wed, 12 Dec 2007 21:12:40 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 130736 for review Message-ID: <200712122112.lBCLCed5063658@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=130736 Change 130736 by marcel@marcel_jnpr on 2007/12/12 21:11:44 Make this compile and run. Apparently the private per processor registers are not used/mapped by the PIC. Use the global per processor registers at the cost of dereferencing PCPU. Time to register an interrupt handler for the IPIs and see if the test IPI works... Affected files ... .. //depot/projects/powerpc/sys/powerpc/include/openpicreg.h#5 edit .. //depot/projects/powerpc/sys/powerpc/powerpc/mp_machdep.c#12 edit .. //depot/projects/powerpc/sys/powerpc/powerpc/openpic.c#5 edit Differences ... ==== //depot/projects/powerpc/sys/powerpc/include/openpicreg.h#5 (text+ko) ==== @@ -40,8 +40,8 @@ #define OPENPIC_IPI_DISPATCH(ipi) (0x40 + (ipi) * 0x10) /* current task priority reg */ -#define OPENPIC_PRIORITY 0x80 -#define OPENPIC_PRIORITY_MASK 0x0000000f +#define OPENPIC_TPR 0x80 +#define OPENPIC_TPR_MASK 0x0000000f #define OPENPIC_WHOAMI 0x90 @@ -126,8 +126,8 @@ #define OPENPIC_PCPU_IPI_DISPATCH(cpu, ipi) \ (OPENPIC_PCPU_BASE(cpu) + OPENPIC_IPI_DISPATCH(ipi)) -#define OPENPIC_PCPU_PRIORITY(cpu) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_PRIORITY) +#define OPENPIC_PCPU_TPR(cpu) \ + (OPENPIC_PCPU_BASE(cpu) + OPENPIC_TPR) #define OPENPIC_PCPU_IACK(cpu) \ (OPENPIC_PCPU_BASE(cpu) + OPENPIC_IACK) ==== //depot/projects/powerpc/sys/powerpc/powerpc/mp_machdep.c#12 (text+ko) ==== @@ -30,6 +30,7 @@ #include <sys/param.h> #include <sys/systm.h> #include <sys/kernel.h> +#include <sys/bus.h> #include <sys/pcpu.h> #include <sys/smp.h> ==== //depot/projects/powerpc/sys/powerpc/powerpc/openpic.c#5 (text+ko) ==== @@ -68,12 +68,14 @@ static __inline void openpic_set_priority(struct openpic_softc *sc, int pri) { + u_int tpr; uint32_t x; - x = openpic_read(sc, OPENPIC_PRIORITY); - x &= ~OPENPIC_PRIORITY_MASK; + tpr = OPENPIC_PCPU_TPR(PCPU_GET(cpuid)); + x = openpic_read(sc, tpr); + x &= ~OPENPIC_TPR_MASK; x |= pri; - openpic_write(sc, OPENPIC_PRIORITY, x); + openpic_write(sc, tpr, x); } int @@ -161,8 +163,8 @@ /* clear all pending interrupts */ for (irq = 0; irq < sc->sc_nirq; irq++) { - (void)openpic_read(sc, OPENPIC_IACK); - openpic_write(sc, OPENPIC_EOI, 0); + (void)openpic_read(sc, OPENPIC_PCPU_IACK(PCPU_GET(cpuid))); + openpic_write(sc, OPENPIC_PCPU_EOI(PCPU_GET(cpuid)), 0); } powerpc_register_pic(dev); @@ -182,7 +184,7 @@ sc = device_get_softc(dev); while (1) { - vector = openpic_read(sc, OPENPIC_IACK); + vector = openpic_read(sc, OPENPIC_PCPU_IACK(PCPU_GET(cpuid))); vector &= OPENPIC_VECTOR_MASK; if (vector == 255) break; @@ -209,7 +211,7 @@ struct openpic_softc *sc; sc = device_get_softc(dev); - openpic_write(sc, OPENPIC_EOI, 0); + openpic_write(sc, OPENPIC_PCPU_EOI(PCPU_GET(cpuid)), 0); } void @@ -231,7 +233,7 @@ x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq)); x |= OPENPIC_IMASK; openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); - openpic_write(sc, OPENPIC_EOI, 0); + openpic_write(sc, OPENPIC_PCPU_EOI(PCPU_GET(cpuid)), 0); } void
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