Date: Thu, 6 Sep 2007 19:16:31 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/sparc64/fhc fhc.c src/sys/sparc64/include bus_common.h intr_machdep.h src/sys/sparc64/pci psycho.c psychoreg.h src/sys/sparc64/sparc64 exception.S intr_machdep.c tick.c upa.c src/sys/sparc64/sbus sbus.c sbusreg.h Message-ID: <200709061916.l86JGVbr080788@repoman.freebsd.org>
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marius 2007-09-06 19:16:30 UTC
FreeBSD src repository
Modified files:
sys/sparc64/fhc fhc.c
sys/sparc64/include bus_common.h intr_machdep.h
sys/sparc64/pci psycho.c psychoreg.h
sys/sparc64/sparc64 exception.S intr_machdep.c tick.c upa.c
sys/sparc64/sbus sbus.c sbusreg.h
Log:
o Revamp the sparc64 interrupt code in order to be able to interface
with the INTR_FILTER-enabled MI code. Basically this consists of
registering an interrupt controller (of which there can be multiple
and optionally different ones either per host-to-foo bridge or shared
amongst host-to-foo bridges in any one machine) along with an interrupt
vector as specific argument for all the interrupt vectors used by a
given host-to-foo bridge (roughly similar to registering interrupt
sources on amd64 and i386), providing functions to enable, clear and
disable the interrupts of the children beneath the bridge.
This also includes:
- No longer entering a critical section in tl0_intr() and tl1_intr()
for executing interrupt handlers but rather let the handlers enter
it themselves so in the case of intr_event_handle() we don't enter
a nested critical section.
- Adding infrastructure for binding delivery of interrupt vectors to
specific CPUs which later on can be interfaced with the code from
amd64/i386 for binding interrupts to specific CPUs.
- Getting rid of the wrapper hack introduced along the lines of the
API changes for INTR_FILTER which as a side-effect caused interrupts
associated with ithread handlers only to get the elevated priority
of those associated with filters ("fast handlers") (this removes the
hack also in the non-INTR_FILTER case).
- Disabling (by not clearing) an interrupt in the interrupt controller
until all associated handlers have been executed, which is crucial
for the typical locking strategy of NIC drivers in order to work
correctly in case of shared interrupts. This was a more or less
theoretical problem on sparc64 though, as shared interrupts are
rather uncommon there except for the on-board SCCs and UARTs.
Note that due to the behavior of at least of some of the interrupt
controllers used on sparc64 an enable+EOI instead of a disable+EOI
approach (as implied by the INTR_FILTER MI code and implemented on
other architectures) is used as the latter can cause lost interrupts
or in the worst case interrupt starvation.
o Correct a typo in sbus_alloc_resource() which caused (pass-through)
allocations to only work down to the grandchildren of the bus, which
wasn't a real problem so far as we don't support any devices which are
great-grandchildren or greater of a U2S bridge, yet.
o In fhc(4) use bus_{read,write}_4() instead of bus_space_{read,write}_4()
in order to get rid of sc_bh and sc_bt in the fhc_softc. Also get rid
of some other unneeded members in fhc_softc.
Reviewed by: marcel (earlier version)
Approved by: re (kensmith)
Revision Changes Path
1.18 +124 -151 src/sys/sparc64/fhc/fhc.c
1.7 +3 -0 src/sys/sparc64/include/bus_common.h
1.17 +15 -4 src/sys/sparc64/include/intr_machdep.h
1.69 +212 -172 src/sys/sparc64/pci/psycho.c
1.14 +3 -0 src/sys/sparc64/pci/psychoreg.h
1.46 +132 -127 src/sys/sparc64/sbus/sbus.c
1.4 +3 -0 src/sys/sparc64/sbus/sbusreg.h
1.75 +0 -12 src/sys/sparc64/sparc64/exception.S
1.27 +123 -41 src/sys/sparc64/sparc64/intr_machdep.c
1.22 +2 -0 src/sys/sparc64/sparc64/tick.c
1.9 +86 -38 src/sys/sparc64/sparc64/upa.c
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