Date: Wed, 5 Oct 2016 04:40:49 +0000 (UTC) From: Justin Hibbits <jhibbits@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r306702 - head/sys/powerpc/mpc85xx Message-ID: <201610050440.u954enFt028710@repo.freebsd.org>
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Author: jhibbits Date: Wed Oct 5 04:40:48 2016 New Revision: 306702 URL: https://svnweb.freebsd.org/changeset/base/306702 Log: Fix e500mc/derivatives cpu idle Setting the doze registers wasn't actually working, and was being masked by a bad #ifdef. Since the #ifdef was fixed, now e500mc-based SoCs hang at idle. Fix this by using the intended wait. MFC after: 1 week Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/platform_mpc85xx.c Wed Oct 5 01:01:10 2016 (r306701) +++ head/sys/powerpc/mpc85xx/platform_mpc85xx.c Wed Oct 5 04:40:48 2016 (r306702) @@ -530,9 +530,11 @@ mpc85xx_idle(platform_t plat, int cpu) uint32_t reg; if (mpc85xx_is_qoriq()) { - reg = ccsr_read4(OCP85XX_RCPM_CDOZCR); - ccsr_write4(OCP85XX_RCPM_CDOZCR, reg | (1 << cpu)); - ccsr_read4(OCP85XX_RCPM_CDOZCR); + /* + * Base binutils doesn't know what the 'wait' instruction is, so + * use the opcode encoding here. + */ + __asm __volatile("wrteei 1; .long 0x7c00007c"); } else { reg = mfmsr(); /* Freescale E500 core RM section 6.4.1. */ @@ -544,15 +546,6 @@ mpc85xx_idle(platform_t plat, int cpu) static int mpc85xx_idle_wakeup(platform_t plat, int cpu) { - uint32_t reg; - - if (mpc85xx_is_qoriq()) { - reg = ccsr_read4(OCP85XX_RCPM_CDOZCR); - ccsr_write4(OCP85XX_RCPM_CDOZCR, reg & ~(1 << cpu)); - ccsr_read4(OCP85XX_RCPM_CDOZCR); - - return (1); - } return (0); }
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