Date: Sat, 1 Feb 1997 15:22:06 -0800 (PST) From: John-Mark Gurney <jmg@nike.efn.org> To: Terry Lambert <terry@lambert.org> Cc: hackers@freefall.freebsd.org Subject: Re: performance puzzler Message-ID: <Pine.NEB.3.95.970201151511.27974c-100000@hydrogen.nike.efn.org> In-Reply-To: <199702012151.OAA06709@phaeton.artisoft.com>
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On Sat, 1 Feb 1997, Terry Lambert wrote: > > > Your bus on the 120 is 3MHz slower than the bus on the 66. What you > > > are doing is not I/O bound, it is CPU bound. > > > > umm... this usually isn't true... most of the non 33mhz bus speeds (for > > 486 based chips) are actually 40 mhz or 50mhz... the amd-486/120dx4 is > > actually a 40mhz bus multiplied by 3... it's kinda like the Intel > > 486/100dx4... the chip is actually 3x bus speed (33mhz)... > > Memory bus, or I/O bus? I'm not sure... they usually refere to it as the processor clock.. so I really wouldn't know if they change the speed for both memory or io access... but they don't have to do any speed fiddling if the board is straight isa or a vlb/isa comba... as vlb can be spec'd at 50mhz... > The PCI and EISA standards specify 33MHz as their top end. I didn't know the eisa top end.. but did know the pci limit... most 486/pci boards have a jumper that sets the pci bus to either the bus speed (i.e. 33 or 40mhz) or half that... so you can put a processor clock of 40 or 50mhz on the board (and get a pci bus speed of 20 or 25mhz)... 486based boards are quite different then pentium based boards :)... ttyl... John-Mark gurney_j@efn.org http://resnet.uoregon.edu/~gurney_j/ Modem/FAX: (541) 683-6954 (FreeBSD Box) Live in Peace, destroy Micro$oft, support free software, run FreeBSD (unix)
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