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Date:      Sat, 28 Nov 2009 18:34:35 +0000 (UTC)
From:      Nathan Whitehorn <nwhitehorn@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org
Subject:   svn commit: r199889 - stable/8/sys/powerpc/aim
Message-ID:  <200911281834.nASIYZPq063677@svn.freebsd.org>

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Author: nwhitehorn
Date: Sat Nov 28 18:34:35 2009
New Revision: 199889
URL: http://svn.freebsd.org/changeset/base/199889

Log:
  MFC r197961,197962:
  
  Fix two typos that caused DSISR and CR not to be preserved across context
  switches.

Modified:
  stable/8/sys/powerpc/aim/swtch.S
  stable/8/sys/powerpc/aim/trap_subr.S
Directory Properties:
  stable/8/sys/   (props changed)
  stable/8/sys/amd64/include/xen/   (props changed)
  stable/8/sys/cddl/contrib/opensolaris/   (props changed)
  stable/8/sys/contrib/dev/acpica/   (props changed)
  stable/8/sys/contrib/pf/   (props changed)
  stable/8/sys/dev/xen/xenpci/   (props changed)

Modified: stable/8/sys/powerpc/aim/swtch.S
==============================================================================
--- stable/8/sys/powerpc/aim/swtch.S	Sat Nov 28 17:48:25 2009	(r199888)
+++ stable/8/sys/powerpc/aim/swtch.S	Sat Nov 28 18:34:35 2009	(r199889)
@@ -171,7 +171,7 @@ ENTRY(savectx)
 	mr	%r12,%r2
 	stmw	%r12,PCB_CONTEXT(%r3)	/* Save the non-volatile GP regs */
 	mfcr	%r4			/* Save the condition register */
-	stw	%r4,PCB_CONTEXT(%r3)
+	stw	%r4,PCB_CR(%r3)
 	blr
 
 /*

Modified: stable/8/sys/powerpc/aim/trap_subr.S
==============================================================================
--- stable/8/sys/powerpc/aim/trap_subr.S	Sat Nov 28 17:48:25 2009	(r199888)
+++ stable/8/sys/powerpc/aim/trap_subr.S	Sat Nov 28 18:34:35 2009	(r199889)
@@ -451,7 +451,7 @@ disitrap:
 	lwz	%r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) /* get DAR */
 	stw	%r30,(PC_DBSAVE  +CPUSAVE_AIM_DAR)(%r1) /* save DAR */
 	lwz	%r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) /* get DSISR */
-	lwz	%r30,(PC_DBSAVE  +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */
+	stw	%r30,(PC_DBSAVE  +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */
 	lwz	%r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* get  r28 */
 	stw	%r30,(PC_DBSAVE  +CPUSAVE_R28)(%r1) /* save r28 */
 	lwz	%r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) /* get  r29 */



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