Date: Thu, 13 Jul 2017 19:25:19 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r320957 - in vendor/llvm/dist: . cmake/modules docs docs/CommandGuide docs/tutorial examples/Kaleidoscope/BuildingAJIT/Chapter1 examples/Kaleidoscope/BuildingAJIT/Chapter2 examples/Kale... Message-ID: <201707131925.v6DJPJXw036330@repo.freebsd.org>
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Author: dim Date: Thu Jul 13 19:25:18 2017 New Revision: 320957 URL: https://svnweb.freebsd.org/changeset/base/320957 Log: Vendor import of llvm trunk r307894: https://llvm.org/svn/llvm-project/llvm/trunk@307894 Added: vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h (contents, props changed) vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeBuiltinSymbol.h (contents, props changed) vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/PublicsStreamBuilder.h (contents, props changed) vendor/llvm/dist/include/llvm/IR/SafepointIRVerifier.h (contents, props changed) vendor/llvm/dist/include/llvm/Support/ReverseIteration.h (contents, props changed) vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeBuiltinSymbol.cpp (contents, props changed) vendor/llvm/dist/lib/DebugInfo/PDB/Native/PublicsStreamBuilder.cpp (contents, props changed) vendor/llvm/dist/lib/Fuzzer/test/ShrinkControlFlowSimpleTest.cpp (contents, props changed) vendor/llvm/dist/lib/Fuzzer/test/reduce_inputs.test vendor/llvm/dist/lib/IR/SafepointIRVerifier.cpp (contents, props changed) vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp (contents, props changed) vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUMacroFusion.h (contents, props changed) vendor/llvm/dist/lib/Target/Mips/MipsMTInstrFormats.td vendor/llvm/dist/lib/Target/Mips/MipsMTInstrInfo.td vendor/llvm/dist/test/Analysis/DependenceAnalysis/BasePtrBug.ll vendor/llvm/dist/test/Bitcode/Inputs/module-hash-strtab1.ll vendor/llvm/dist/test/Bitcode/Inputs/module-hash-strtab2.ll vendor/llvm/dist/test/Bitcode/atomic-no-syncscope.ll vendor/llvm/dist/test/Bitcode/atomic-no-syncscope.ll.bc (contents, props changed) vendor/llvm/dist/test/Bitcode/module-hash-strtab.ll vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/select-implicit-def.mir vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-sdiv.mir vendor/llvm/dist/test/CodeGen/AArch64/preferred-function-alignment.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll vendor/llvm/dist/test/CodeGen/AMDGPU/global-smrd-unknown.ll vendor/llvm/dist/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir vendor/llvm/dist/test/CodeGen/AMDGPU/regcoal-subrange-join.mir vendor/llvm/dist/test/CodeGen/AMDGPU/syncscopes.ll vendor/llvm/dist/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir vendor/llvm/dist/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir vendor/llvm/dist/test/CodeGen/ARM/ror.ll vendor/llvm/dist/test/CodeGen/ARM/scavenging.mir vendor/llvm/dist/test/CodeGen/AVR/branch-relaxation.ll vendor/llvm/dist/test/CodeGen/AVR/frmidx-iterator-bug.ll vendor/llvm/dist/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll vendor/llvm/dist/test/CodeGen/Generic/pr33094.ll vendor/llvm/dist/test/CodeGen/Hexagon/hasfp-crash1.ll vendor/llvm/dist/test/CodeGen/Hexagon/hasfp-crash2.ll vendor/llvm/dist/test/CodeGen/Hexagon/hvx-nontemporal.ll vendor/llvm/dist/test/CodeGen/Hexagon/target-flag-ext.mir vendor/llvm/dist/test/CodeGen/MIR/AArch64/invalid-target-memoperands.mir vendor/llvm/dist/test/CodeGen/MIR/AArch64/target-memoperands.mir vendor/llvm/dist/test/CodeGen/MIR/AMDGPU/syncscopes.mir vendor/llvm/dist/test/CodeGen/MIR/AMDGPU/target-flags.mir vendor/llvm/dist/test/CodeGen/MIR/Hexagon/target-flags.mir vendor/llvm/dist/test/CodeGen/MIR/X86/tied-physical-regs-match.mir vendor/llvm/dist/test/CodeGen/PowerPC/PR33636.ll vendor/llvm/dist/test/CodeGen/PowerPC/ppc-ctr-dead-code.ll vendor/llvm/dist/test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll vendor/llvm/dist/test/CodeGen/PowerPC/pr33093.ll vendor/llvm/dist/test/CodeGen/PowerPC/select-addrRegRegOnly.ll vendor/llvm/dist/test/CodeGen/PowerPC/testBitReverse.ll vendor/llvm/dist/test/CodeGen/PowerPC/vec_extract_p9.ll vendor/llvm/dist/test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir vendor/llvm/dist/test/CodeGen/WebAssembly/umulo-i64.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/GV.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-GV.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-GV.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-and-setcc-512.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-int-to-vector-bool.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-setcc-512.ll vendor/llvm/dist/test/CodeGen/X86/combine-rotates.ll vendor/llvm/dist/test/CodeGen/X86/fast-isel-gc-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/fastisel-softfloat.ll vendor/llvm/dist/test/CodeGen/X86/pr33715.ll vendor/llvm/dist/test/CodeGen/X86/rdrand-x86_64.ll vendor/llvm/dist/test/CodeGen/X86/rdseed-x86_64.ll vendor/llvm/dist/test/CodeGen/X86/sink-gep-before-mem-inst.ll vendor/llvm/dist/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll vendor/llvm/dist/test/CodeGen/X86/sse4a-schedule.ll vendor/llvm/dist/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-macho.o (contents, props changed) vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-macho.s (contents, props changed) vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64-space (contents, props changed) vendor/llvm/dist/test/DebugInfo/PDB/Inputs/every-type.cpp (contents, props changed) vendor/llvm/dist/test/DebugInfo/PDB/Inputs/every-type.pdb (contents, props changed) vendor/llvm/dist/test/DebugInfo/PDB/Inputs/every-type.yaml vendor/llvm/dist/test/DebugInfo/PDB/every-type.test vendor/llvm/dist/test/DebugInfo/invalid-relocations.test vendor/llvm/dist/test/Instrumentation/MemorySanitizer/unsized_type.ll vendor/llvm/dist/test/LTO/Resolution/X86/linker-redef-thin.ll vendor/llvm/dist/test/Linker/Inputs/syncscope-1.ll vendor/llvm/dist/test/Linker/Inputs/syncscope-2.ll vendor/llvm/dist/test/Linker/Inputs/thumb-module-inline-asm.ll vendor/llvm/dist/test/Linker/link-arm-and-thumb-module-inline-asm.ll vendor/llvm/dist/test/Linker/syncscopes.ll vendor/llvm/dist/test/MC/ARM/invalid-instructions-spellcheck.s (contents, props changed) vendor/llvm/dist/test/MC/Disassembler/Mips/mt/ vendor/llvm/dist/test/MC/Disassembler/Mips/mt/valid-r2-el.txt (contents, props changed) vendor/llvm/dist/test/MC/Disassembler/Mips/mt/valid-r2.txt (contents, props changed) vendor/llvm/dist/test/MC/Mips/addend.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/ vendor/llvm/dist/test/MC/Mips/mt/abiflag.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/invalid-wrong-error.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/invalid.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/mftr-mttr-aliases.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/mftr-mttr-reserved-valid.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/module-directive-invalid.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/module-directive.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/set-directive.s (contents, props changed) vendor/llvm/dist/test/MC/Mips/mt/valid.s (contents, props changed) vendor/llvm/dist/test/MC/WebAssembly/array-fill.ll vendor/llvm/dist/test/Object/Inputs/trivial-object-test.wasm (contents, props changed) vendor/llvm/dist/test/SafepointIRVerifier/ vendor/llvm/dist/test/SafepointIRVerifier/basic-use-after-reloc.ll vendor/llvm/dist/test/SafepointIRVerifier/compares.ll vendor/llvm/dist/test/SafepointIRVerifier/constant-bases.ll vendor/llvm/dist/test/SafepointIRVerifier/unrecorded-live-at-sp.ll vendor/llvm/dist/test/SafepointIRVerifier/uses-in-phi-nodes.ll vendor/llvm/dist/test/Transforms/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll vendor/llvm/dist/test/Transforms/CodeGenPrepare/crash-on-large-allocas.ll vendor/llvm/dist/test/Transforms/ConstantHoisting/ARM/insertvalue.ll vendor/llvm/dist/test/Transforms/IndVarSimplify/canonicalize-cmp.ll vendor/llvm/dist/test/Transforms/Inline/ARM/ vendor/llvm/dist/test/Transforms/Inline/ARM/inline-target-attr.ll vendor/llvm/dist/test/Transforms/Inline/ARM/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll vendor/llvm/dist/test/Transforms/InstCombine/cmp-intrinsic.ll vendor/llvm/dist/test/Transforms/InstCombine/pr33689_same_bitwidth.ll vendor/llvm/dist/test/Transforms/LoopRotate/pr33701.ll vendor/llvm/dist/test/Transforms/LoopStrengthReduce/X86/lsr-filtering-scaledreg.ll vendor/llvm/dist/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll vendor/llvm/dist/test/Transforms/LoopVectorize/pr33706.ll vendor/llvm/dist/test/Transforms/NewGVN/pr33720.ll vendor/llvm/dist/test/Transforms/PGOProfile/counter_promo_nest.ll vendor/llvm/dist/test/Transforms/SimplifyCFG/implied-and-or.ll vendor/llvm/dist/test/Transforms/ThinLTOBitcodeWriter/pr33536.ll vendor/llvm/dist/test/tools/llvm-cov/threads.c (contents, props changed) vendor/llvm/dist/test/tools/llvm-objdump/ARM/Inputs/reloc-half.obj.macho-arm (contents, props changed) vendor/llvm/dist/test/tools/llvm-objdump/ARM/macho-reloc-half.test vendor/llvm/dist/test/tools/llvm-objdump/Inputs/trivial.ll vendor/llvm/dist/test/tools/llvm-objdump/Inputs/trivial.obj.wasm (contents, props changed) vendor/llvm/dist/test/tools/sanstats/Inputs/ vendor/llvm/dist/tools/llvm-pdbutil/DiffPrinter.cpp (contents, props changed) vendor/llvm/dist/tools/llvm-pdbutil/DiffPrinter.h (contents, props changed) vendor/llvm/dist/tools/opt-viewer/ vendor/llvm/dist/tools/opt-viewer/CMakeLists.txt (contents, props changed) vendor/llvm/dist/tools/opt-viewer/opt-diff.py (contents, props changed) vendor/llvm/dist/tools/opt-viewer/opt-stats.py (contents, props changed) vendor/llvm/dist/tools/opt-viewer/opt-viewer.py (contents, props changed) vendor/llvm/dist/tools/opt-viewer/optpmap.py (contents, props changed) vendor/llvm/dist/tools/opt-viewer/optrecord.py (contents, props changed) vendor/llvm/dist/tools/opt-viewer/style.css (contents, props changed) vendor/llvm/dist/unittests/IR/PassBuilderCallbacksTest.cpp (contents, props changed) Deleted: vendor/llvm/dist/docs/Dummy.html vendor/llvm/dist/test/CodeGen/PowerPC/bitreverse.ll vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64 space vendor/llvm/dist/test/Transforms/GVN/PRE/phi-translate-2.ll vendor/llvm/dist/test/tools/llvm-objdump/Inputs/test.wasm vendor/llvm/dist/utils/opt-viewer/opt-diff.py vendor/llvm/dist/utils/opt-viewer/opt-stats.py vendor/llvm/dist/utils/opt-viewer/opt-viewer.py vendor/llvm/dist/utils/opt-viewer/optpmap.py vendor/llvm/dist/utils/opt-viewer/optrecord.py vendor/llvm/dist/utils/opt-viewer/style.css Modified: vendor/llvm/dist/CMakeLists.txt vendor/llvm/dist/cmake/modules/AddLLVM.cmake vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake vendor/llvm/dist/cmake/modules/LLVMExternalProjectUtils.cmake vendor/llvm/dist/docs/AMDGPUUsage.rst vendor/llvm/dist/docs/CMake.rst vendor/llvm/dist/docs/CMakePrimer.rst vendor/llvm/dist/docs/CommandGuide/lit.rst vendor/llvm/dist/docs/CommandGuide/llvm-cov.rst vendor/llvm/dist/docs/CommandGuide/llvm-profdata.rst vendor/llvm/dist/docs/Coroutines.rst vendor/llvm/dist/docs/Docker.rst vendor/llvm/dist/docs/HowToAddABuilder.rst vendor/llvm/dist/docs/LangRef.rst vendor/llvm/dist/docs/LibFuzzer.rst vendor/llvm/dist/docs/tutorial/BuildingAJIT1.rst vendor/llvm/dist/docs/tutorial/BuildingAJIT2.rst vendor/llvm/dist/docs/tutorial/LangImpl02.rst vendor/llvm/dist/docs/tutorial/LangImpl03.rst vendor/llvm/dist/docs/tutorial/LangImpl04.rst vendor/llvm/dist/docs/tutorial/LangImpl05.rst vendor/llvm/dist/docs/tutorial/LangImpl06.rst vendor/llvm/dist/docs/tutorial/OCamlLangImpl5.rst vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/KaleidoscopeJIT.h vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/KaleidoscopeJIT.h vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter5/KaleidoscopeJIT.h vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter5/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/Chapter4/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/Chapter5/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/Chapter6/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/Chapter7/toy.cpp vendor/llvm/dist/examples/Kaleidoscope/include/KaleidoscopeJIT.h vendor/llvm/dist/include/llvm-c/OrcBindings.h vendor/llvm/dist/include/llvm/ADT/APInt.h vendor/llvm/dist/include/llvm/ADT/STLExtras.h vendor/llvm/dist/include/llvm/ADT/SmallPtrSet.h vendor/llvm/dist/include/llvm/Analysis/BlockFrequencyInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/CGSCCPassManager.h vendor/llvm/dist/include/llvm/Analysis/InlineCost.h vendor/llvm/dist/include/llvm/Analysis/LazyCallGraph.h vendor/llvm/dist/include/llvm/Analysis/MemoryBuiltins.h vendor/llvm/dist/include/llvm/Analysis/RegionInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h vendor/llvm/dist/include/llvm/BinaryFormat/Wasm.h vendor/llvm/dist/include/llvm/Bitcode/LLVMBitCodes.h vendor/llvm/dist/include/llvm/CodeGen/AsmPrinter.h vendor/llvm/dist/include/llvm/CodeGen/BasicTTIImpl.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/InstructionSelector.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h vendor/llvm/dist/include/llvm/CodeGen/LiveRegUnits.h vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h vendor/llvm/dist/include/llvm/CodeGen/MachineMemOperand.h vendor/llvm/dist/include/llvm/CodeGen/RuntimeLibcalls.h vendor/llvm/dist/include/llvm/CodeGen/ScheduleDAG.h vendor/llvm/dist/include/llvm/CodeGen/SelectionDAG.h vendor/llvm/dist/include/llvm/CodeGen/SelectionDAGNodes.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolRecord.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeIndex.h vendor/llvm/dist/include/llvm/DebugInfo/DIContext.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFContext.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/DbiStream.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/DbiStreamBuilder.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NamedStreamMap.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeCompilandSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeExeSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeRawSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeSession.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/PDBFileBuilder.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/PDBStringTable.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/PublicsStream.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/RawTypes.h vendor/llvm/dist/include/llvm/ExecutionEngine/JITSymbol.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/GlobalMappingLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/IRCompileLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/IRTransformLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/LambdaResolver.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/LazyEmittingLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/ObjectTransformLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/OrcError.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/RuntimeDyld.h vendor/llvm/dist/include/llvm/IR/Constants.h vendor/llvm/dist/include/llvm/IR/IRBuilder.h vendor/llvm/dist/include/llvm/IR/Instructions.h vendor/llvm/dist/include/llvm/IR/IntrinsicInst.h vendor/llvm/dist/include/llvm/IR/Intrinsics.td vendor/llvm/dist/include/llvm/IR/LLVMContext.h vendor/llvm/dist/include/llvm/IR/Module.h vendor/llvm/dist/include/llvm/IR/ModuleSummaryIndex.h vendor/llvm/dist/include/llvm/IR/PassManager.h vendor/llvm/dist/include/llvm/IR/PatternMatch.h vendor/llvm/dist/include/llvm/IR/Type.h vendor/llvm/dist/include/llvm/InitializePasses.h vendor/llvm/dist/include/llvm/MC/MCAsmBackend.h vendor/llvm/dist/include/llvm/MC/MCDisassembler/MCDisassembler.h vendor/llvm/dist/include/llvm/MC/MCMachObjectWriter.h vendor/llvm/dist/include/llvm/MC/MCObjectWriter.h vendor/llvm/dist/include/llvm/MC/MCSymbolWasm.h vendor/llvm/dist/include/llvm/Object/COFF.h vendor/llvm/dist/include/llvm/Object/Wasm.h vendor/llvm/dist/include/llvm/ObjectYAML/WasmYAML.h vendor/llvm/dist/include/llvm/Option/OptTable.h vendor/llvm/dist/include/llvm/Passes/PassBuilder.h vendor/llvm/dist/include/llvm/ProfileData/InstrProf.h vendor/llvm/dist/include/llvm/ProfileData/InstrProfReader.h vendor/llvm/dist/include/llvm/ProfileData/InstrProfWriter.h vendor/llvm/dist/include/llvm/ProfileData/ProfileCommon.h vendor/llvm/dist/include/llvm/Support/BlockFrequency.h vendor/llvm/dist/include/llvm/Support/Compiler.h vendor/llvm/dist/include/llvm/Support/DynamicLibrary.h vendor/llvm/dist/include/llvm/Support/ErrorHandling.h vendor/llvm/dist/include/llvm/Support/GenericDomTreeConstruction.h vendor/llvm/dist/include/llvm/Support/UnicodeCharRanges.h vendor/llvm/dist/include/llvm/Target/GlobalISel/SelectionDAGCompat.td vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h vendor/llvm/dist/include/llvm/Target/TargetLowering.h vendor/llvm/dist/include/llvm/Transforms/Scalar/GVN.h vendor/llvm/dist/include/llvm/Transforms/Utils/LowerMemIntrinsics.h vendor/llvm/dist/include/llvm/Transforms/Utils/SSAUpdaterImpl.h vendor/llvm/dist/include/llvm/module.modulemap vendor/llvm/dist/lib/Analysis/BasicAliasAnalysis.cpp vendor/llvm/dist/lib/Analysis/BranchProbabilityInfo.cpp vendor/llvm/dist/lib/Analysis/CGSCCPassManager.cpp vendor/llvm/dist/lib/Analysis/CaptureTracking.cpp vendor/llvm/dist/lib/Analysis/DemandedBits.cpp vendor/llvm/dist/lib/Analysis/DependenceAnalysis.cpp vendor/llvm/dist/lib/Analysis/InstructionSimplify.cpp vendor/llvm/dist/lib/Analysis/LazyCallGraph.cpp vendor/llvm/dist/lib/Analysis/Lint.cpp vendor/llvm/dist/lib/Analysis/LoopInfo.cpp vendor/llvm/dist/lib/Analysis/MemoryBuiltins.cpp vendor/llvm/dist/lib/Analysis/ModuleSummaryAnalysis.cpp vendor/llvm/dist/lib/Analysis/ScalarEvolution.cpp vendor/llvm/dist/lib/Analysis/TargetTransformInfo.cpp vendor/llvm/dist/lib/Analysis/ValueTracking.cpp vendor/llvm/dist/lib/Analysis/VectorUtils.cpp vendor/llvm/dist/lib/AsmParser/LLLexer.cpp vendor/llvm/dist/lib/AsmParser/LLParser.cpp vendor/llvm/dist/lib/AsmParser/LLParser.h vendor/llvm/dist/lib/AsmParser/LLToken.h vendor/llvm/dist/lib/Bitcode/Reader/BitcodeReader.cpp vendor/llvm/dist/lib/Bitcode/Writer/BitcodeWriter.cpp vendor/llvm/dist/lib/CodeGen/AtomicExpandPass.cpp vendor/llvm/dist/lib/CodeGen/CodeGen.cpp vendor/llvm/dist/lib/CodeGen/CodeGenPrepare.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/IRTranslator.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/InstructionSelector.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/LegalizerHelper.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp vendor/llvm/dist/lib/CodeGen/LiveRegUnits.cpp vendor/llvm/dist/lib/CodeGen/MIRParser/MILexer.cpp vendor/llvm/dist/lib/CodeGen/MIRParser/MILexer.h vendor/llvm/dist/lib/CodeGen/MIRParser/MIParser.cpp vendor/llvm/dist/lib/CodeGen/MIRPrinter.cpp vendor/llvm/dist/lib/CodeGen/MachineBlockPlacement.cpp vendor/llvm/dist/lib/CodeGen/MachineFunction.cpp vendor/llvm/dist/lib/CodeGen/MachineInstr.cpp vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp vendor/llvm/dist/lib/CodeGen/MacroFusion.cpp vendor/llvm/dist/lib/CodeGen/PostRAHazardRecognizer.cpp vendor/llvm/dist/lib/CodeGen/RegAllocFast.cpp vendor/llvm/dist/lib/CodeGen/RegAllocGreedy.cpp vendor/llvm/dist/lib/CodeGen/RegAllocPBQP.cpp vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp vendor/llvm/dist/lib/CodeGen/RegisterScavenging.cpp vendor/llvm/dist/lib/CodeGen/ScheduleDAG.cpp vendor/llvm/dist/lib/CodeGen/ScheduleDAGInstrs.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/InstrEmitter.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.h vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAG.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp vendor/llvm/dist/lib/CodeGen/SjLjEHPrepare.cpp vendor/llvm/dist/lib/CodeGen/SplitKit.cpp vendor/llvm/dist/lib/CodeGen/TargetLoweringBase.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/SymbolDumper.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFContext.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFDie.cpp vendor/llvm/dist/lib/DebugInfo/PDB/CMakeLists.txt vendor/llvm/dist/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/DbiStream.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeCompilandSymbol.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeSession.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/PDBFile.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/PDBStringTable.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/PublicsStream.cpp vendor/llvm/dist/lib/ExecutionEngine/MCJIT/MCJIT.cpp vendor/llvm/dist/lib/ExecutionEngine/Orc/OrcCBindings.cpp vendor/llvm/dist/lib/ExecutionEngine/Orc/OrcCBindingsStack.h vendor/llvm/dist/lib/ExecutionEngine/Orc/OrcError.cpp vendor/llvm/dist/lib/ExecutionEngine/Orc/OrcMCJITReplacement.h vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp vendor/llvm/dist/lib/Fuzzer/CMakeLists.txt vendor/llvm/dist/lib/Fuzzer/FuzzerCorpus.h vendor/llvm/dist/lib/Fuzzer/FuzzerDriver.cpp vendor/llvm/dist/lib/Fuzzer/FuzzerExtFunctionsWeak.cpp vendor/llvm/dist/lib/Fuzzer/FuzzerFlags.def vendor/llvm/dist/lib/Fuzzer/FuzzerIOWindows.cpp vendor/llvm/dist/lib/Fuzzer/FuzzerInternal.h vendor/llvm/dist/lib/Fuzzer/FuzzerLoop.cpp vendor/llvm/dist/lib/Fuzzer/FuzzerOptions.h vendor/llvm/dist/lib/Fuzzer/FuzzerUtilDarwin.cpp vendor/llvm/dist/lib/Fuzzer/test/CMakeLists.txt vendor/llvm/dist/lib/Fuzzer/test/FuzzerUnittest.cpp vendor/llvm/dist/lib/IR/AsmWriter.cpp vendor/llvm/dist/lib/IR/CMakeLists.txt vendor/llvm/dist/lib/IR/ConstantFold.cpp vendor/llvm/dist/lib/IR/Constants.cpp vendor/llvm/dist/lib/IR/Core.cpp vendor/llvm/dist/lib/IR/Instruction.cpp vendor/llvm/dist/lib/IR/Instructions.cpp vendor/llvm/dist/lib/IR/LLVMContext.cpp vendor/llvm/dist/lib/IR/LLVMContextImpl.cpp vendor/llvm/dist/lib/IR/LLVMContextImpl.h vendor/llvm/dist/lib/IR/Module.cpp vendor/llvm/dist/lib/IR/Type.cpp vendor/llvm/dist/lib/IR/Verifier.cpp vendor/llvm/dist/lib/LTO/LTO.cpp vendor/llvm/dist/lib/Linker/IRMover.cpp vendor/llvm/dist/lib/MC/ELFObjectWriter.cpp vendor/llvm/dist/lib/MC/MCAssembler.cpp vendor/llvm/dist/lib/MC/MachObjectWriter.cpp vendor/llvm/dist/lib/MC/WasmObjectWriter.cpp vendor/llvm/dist/lib/MC/WinCOFFObjectWriter.cpp vendor/llvm/dist/lib/Object/WasmObjectFile.cpp vendor/llvm/dist/lib/Object/WindowsResource.cpp vendor/llvm/dist/lib/ObjectYAML/WasmYAML.cpp vendor/llvm/dist/lib/Option/OptTable.cpp vendor/llvm/dist/lib/Passes/PassBuilder.cpp vendor/llvm/dist/lib/ProfileData/InstrProf.cpp vendor/llvm/dist/lib/ProfileData/InstrProfReader.cpp vendor/llvm/dist/lib/ProfileData/InstrProfWriter.cpp vendor/llvm/dist/lib/Support/CommandLine.cpp vendor/llvm/dist/lib/Support/DynamicLibrary.cpp vendor/llvm/dist/lib/Support/ErrorHandling.cpp vendor/llvm/dist/lib/Support/Host.cpp vendor/llvm/dist/lib/Support/Mutex.cpp vendor/llvm/dist/lib/Support/Unix/DynamicLibrary.inc vendor/llvm/dist/lib/Support/Unix/Host.inc vendor/llvm/dist/lib/Support/Unix/Program.inc vendor/llvm/dist/lib/Support/Windows/DynamicLibrary.inc vendor/llvm/dist/lib/Support/Windows/Host.inc vendor/llvm/dist/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64CondBrTuning.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64FastISel.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.h vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.td vendor/llvm/dist/lib/Target/AArch64/AArch64InstructionSelector.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64LegalizerInfo.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64Subtarget.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64Subtarget.h vendor/llvm/dist/lib/Target/AArch64/AArch64TargetMachine.cpp vendor/llvm/dist/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp vendor/llvm/dist/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp vendor/llvm/dist/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUISelLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUSubtarget.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp vendor/llvm/dist/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp vendor/llvm/dist/lib/Target/AMDGPU/CMakeLists.txt vendor/llvm/dist/lib/Target/AMDGPU/GCNIterativeScheduler.cpp vendor/llvm/dist/lib/Target/AMDGPU/GCNMinRegStrategy.cpp vendor/llvm/dist/lib/Target/AMDGPU/GCNRegPressure.cpp vendor/llvm/dist/lib/Target/AMDGPU/GCNSchedStrategy.cpp vendor/llvm/dist/lib/Target/AMDGPU/GCNSchedStrategy.h vendor/llvm/dist/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp vendor/llvm/dist/lib/Target/AMDGPU/MIMGInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp vendor/llvm/dist/lib/Target/AMDGPU/R600ISelLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/R600ISelLowering.h vendor/llvm/dist/lib/Target/AMDGPU/R600MachineScheduler.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIFoldOperands.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.h vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.h vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.td vendor/llvm/dist/lib/Target/AMDGPU/SIMachineScheduler.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIShrinkInstructions.cpp vendor/llvm/dist/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/VOP3PInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/VOPInstructions.td vendor/llvm/dist/lib/Target/ARM/ARMAsmPrinter.cpp vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMBaseRegisterInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMCallLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.h vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb2.td vendor/llvm/dist/lib/Target/ARM/ARMInstructionSelector.cpp vendor/llvm/dist/lib/Target/ARM/ARMLegalizerInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMLegalizerInfo.h vendor/llvm/dist/lib/Target/ARM/ARMRegisterBankInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMTargetTransformInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMTargetTransformInfo.h vendor/llvm/dist/lib/Target/ARM/AsmParser/ARMAsmParser.cpp vendor/llvm/dist/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp vendor/llvm/dist/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h vendor/llvm/dist/lib/Target/ARM/Thumb1FrameLowering.cpp vendor/llvm/dist/lib/Target/AVR/AVRAsmPrinter.cpp vendor/llvm/dist/lib/Target/AVR/AVRDevices.td vendor/llvm/dist/lib/Target/AVR/AVRInstrInfo.cpp vendor/llvm/dist/lib/Target/AVR/AVRInstrInfo.h vendor/llvm/dist/lib/Target/AVR/AVRInstrInfo.td vendor/llvm/dist/lib/Target/AVR/AVRMCInstLower.cpp vendor/llvm/dist/lib/Target/AVR/AVRRegisterInfo.cpp vendor/llvm/dist/lib/Target/AVR/AVRRegisterInfo.td vendor/llvm/dist/lib/Target/AVR/AVRTargetMachine.cpp vendor/llvm/dist/lib/Target/AVR/AsmParser/AVRAsmParser.cpp vendor/llvm/dist/lib/Target/AVR/InstPrinter/AVRInstPrinter.cpp vendor/llvm/dist/lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp vendor/llvm/dist/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp vendor/llvm/dist/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonBitSimplify.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonBitTracker.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonConstPropagation.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonFrameLowering.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonGenPredicate.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonISelLowering.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonISelLowering.h vendor/llvm/dist/lib/Target/Hexagon/HexagonInstrInfo.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonInstrInfo.h vendor/llvm/dist/lib/Target/Hexagon/HexagonMachineScheduler.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonPatterns.td vendor/llvm/dist/lib/Target/Hexagon/HexagonPseudo.td vendor/llvm/dist/lib/Target/Hexagon/HexagonSplitDouble.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonTargetMachine.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp vendor/llvm/dist/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp vendor/llvm/dist/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h vendor/llvm/dist/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp vendor/llvm/dist/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp vendor/llvm/dist/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp vendor/llvm/dist/lib/Target/Mips/AsmParser/MipsAsmParser.cpp vendor/llvm/dist/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h vendor/llvm/dist/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp vendor/llvm/dist/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h vendor/llvm/dist/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp vendor/llvm/dist/lib/Target/Mips/Mips.td vendor/llvm/dist/lib/Target/Mips/MipsInstrInfo.td vendor/llvm/dist/lib/Target/Mips/MipsSchedule.td vendor/llvm/dist/lib/Target/Mips/MipsScheduleGeneric.td vendor/llvm/dist/lib/Target/Mips/MipsScheduleP5600.td vendor/llvm/dist/lib/Target/Mips/MipsSubtarget.cpp vendor/llvm/dist/lib/Target/Mips/MipsSubtarget.h vendor/llvm/dist/lib/Target/Mips/MipsTargetStreamer.h vendor/llvm/dist/lib/Target/NVPTX/NVPTXISelLowering.cpp vendor/llvm/dist/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp vendor/llvm/dist/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCCTRLoops.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCFrameLowering.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.h vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.td vendor/llvm/dist/lib/Target/PowerPC/PPCInstrVSX.td vendor/llvm/dist/lib/Target/PowerPC/PPCScheduleP9.td vendor/llvm/dist/lib/Target/PowerPC/PPCSubtarget.h vendor/llvm/dist/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp vendor/llvm/dist/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp vendor/llvm/dist/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp vendor/llvm/dist/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZHazardRecognizer.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.h vendor/llvm/dist/lib/Target/SystemZ/SystemZInstrInfo.td vendor/llvm/dist/lib/Target/SystemZ/SystemZLDCleanup.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZMachineScheduler.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZOperators.td vendor/llvm/dist/lib/Target/SystemZ/SystemZScheduleZ13.td vendor/llvm/dist/lib/Target/SystemZ/SystemZScheduleZ196.td vendor/llvm/dist/lib/Target/SystemZ/SystemZScheduleZEC12.td vendor/llvm/dist/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp vendor/llvm/dist/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp vendor/llvm/dist/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp vendor/llvm/dist/lib/Target/X86/AsmParser/X86AsmParser.cpp vendor/llvm/dist/lib/Target/X86/InstPrinter/X86InstComments.cpp vendor/llvm/dist/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp vendor/llvm/dist/lib/Target/X86/Utils/X86ShuffleDecode.cpp vendor/llvm/dist/lib/Target/X86/Utils/X86ShuffleDecode.h vendor/llvm/dist/lib/Target/X86/X86.td vendor/llvm/dist/lib/Target/X86/X86CallLowering.cpp vendor/llvm/dist/lib/Target/X86/X86CallLowering.h vendor/llvm/dist/lib/Target/X86/X86CallingConv.td vendor/llvm/dist/lib/Target/X86/X86FastISel.cpp vendor/llvm/dist/lib/Target/X86/X86FrameLowering.cpp vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist/lib/Target/X86/X86ISelLowering.h vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp vendor/llvm/dist/lib/Target/X86/X86InstructionSelector.cpp vendor/llvm/dist/lib/Target/X86/X86LegalizerInfo.cpp vendor/llvm/dist/lib/Target/X86/X86MCInstLower.cpp vendor/llvm/dist/lib/Target/X86/X86SchedSandyBridge.td vendor/llvm/dist/lib/Target/X86/X86ScheduleBtVer2.td vendor/llvm/dist/lib/Target/X86/X86TargetTransformInfo.cpp vendor/llvm/dist/lib/Transforms/IPO/ArgumentPromotion.cpp vendor/llvm/dist/lib/Transforms/IPO/FunctionImport.cpp vendor/llvm/dist/lib/Transforms/IPO/GlobalOpt.cpp vendor/llvm/dist/lib/Transforms/IPO/Inliner.cpp vendor/llvm/dist/lib/Transforms/IPO/LowerTypeTests.cpp vendor/llvm/dist/lib/Transforms/IPO/PassManagerBuilder.cpp vendor/llvm/dist/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAddSub.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCalls.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCasts.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineInternal.h vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombinePHI.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSelect.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineShifts.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineVectorOps.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstructionCombining.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/AddressSanitizer.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/CFGMST.h vendor/llvm/dist/lib/Transforms/Instrumentation/InstrProfiling.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/MaximumSpanningTree.h vendor/llvm/dist/lib/Transforms/Instrumentation/MemorySanitizer.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/PGOInstrumentation.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/ThreadSanitizer.cpp vendor/llvm/dist/lib/Transforms/Scalar/ConstantHoisting.cpp vendor/llvm/dist/lib/Transforms/Scalar/EarlyCSE.cpp vendor/llvm/dist/lib/Transforms/Scalar/GVN.cpp vendor/llvm/dist/lib/Transforms/Scalar/InferAddressSpaces.cpp vendor/llvm/dist/lib/Transforms/Scalar/JumpThreading.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopDeletion.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopIdiomRecognize.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopInterchange.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopRotation.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp vendor/llvm/dist/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp vendor/llvm/dist/lib/Transforms/Scalar/NewGVN.cpp vendor/llvm/dist/lib/Transforms/Scalar/Reassociate.cpp vendor/llvm/dist/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp vendor/llvm/dist/lib/Transforms/Scalar/SCCP.cpp vendor/llvm/dist/lib/Transforms/Scalar/SROA.cpp vendor/llvm/dist/lib/Transforms/Scalar/StructurizeCFG.cpp vendor/llvm/dist/lib/Transforms/Utils/CloneFunction.cpp vendor/llvm/dist/lib/Transforms/Utils/CmpInstAnalysis.cpp vendor/llvm/dist/lib/Transforms/Utils/CodeExtractor.cpp vendor/llvm/dist/lib/Transforms/Utils/Evaluator.cpp vendor/llvm/dist/lib/Transforms/Utils/FunctionComparator.cpp vendor/llvm/dist/lib/Transforms/Utils/Local.cpp vendor/llvm/dist/lib/Transforms/Utils/LoopUnrollRuntime.cpp vendor/llvm/dist/lib/Transforms/Utils/LowerMemIntrinsics.cpp vendor/llvm/dist/lib/Transforms/Utils/SimplifyCFG.cpp vendor/llvm/dist/lib/Transforms/Utils/SimplifyIndVar.cpp vendor/llvm/dist/lib/Transforms/Utils/SimplifyLibCalls.cpp vendor/llvm/dist/lib/Transforms/Utils/VNCoercion.cpp vendor/llvm/dist/lib/Transforms/Vectorize/LoopVectorize.cpp vendor/llvm/dist/lib/Transforms/Vectorize/SLPVectorizer.cpp vendor/llvm/dist/runtimes/CMakeLists.txt vendor/llvm/dist/runtimes/Components.cmake.in vendor/llvm/dist/test/Analysis/BasicAA/unreachable-block.ll vendor/llvm/dist/test/Analysis/CostModel/X86/slm-arith-costs.ll vendor/llvm/dist/test/Analysis/ScalarEvolution/guards.ll vendor/llvm/dist/test/Assembler/2003-11-11-ImplicitRename.ll vendor/llvm/dist/test/Assembler/2007-11-26-AttributeOverload.ll vendor/llvm/dist/test/Assembler/atomic.ll vendor/llvm/dist/test/Bitcode/atomic.ll vendor/llvm/dist/test/Bitcode/compatibility-3.6.ll vendor/llvm/dist/test/Bitcode/compatibility-3.7.ll vendor/llvm/dist/test/Bitcode/compatibility-3.8.ll vendor/llvm/dist/test/Bitcode/compatibility-3.9.ll vendor/llvm/dist/test/Bitcode/compatibility-4.0.ll vendor/llvm/dist/test/Bitcode/compatibility.ll vendor/llvm/dist/test/Bitcode/memInstructions.3.2.ll vendor/llvm/dist/test/Bitcode/module_hash.ll vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll vendor/llvm/dist/test/CodeGen/AArch64/arm64-csldst-mmo.ll vendor/llvm/dist/test/CodeGen/AArch64/arm64-misched-forwarding-A53.ll vendor/llvm/dist/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll vendor/llvm/dist/test/CodeGen/AArch64/fence-singlethread.ll vendor/llvm/dist/test/CodeGen/AArch64/tailcall_misched_graph.ll vendor/llvm/dist/test/CodeGen/AMDGPU/add.i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/add.ll vendor/llvm/dist/test/CodeGen/AMDGPU/add.v2i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/add_i128.ll vendor/llvm/dist/test/CodeGen/AMDGPU/add_i64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/addrspacecast.ll vendor/llvm/dist/test/CodeGen/AMDGPU/alignbit-pat.ll vendor/llvm/dist/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll vendor/llvm/dist/test/CodeGen/AMDGPU/and-gcn.ll vendor/llvm/dist/test/CodeGen/AMDGPU/and.ll vendor/llvm/dist/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll vendor/llvm/dist/test/CodeGen/AMDGPU/bitreverse.ll vendor/llvm/dist/test/CodeGen/AMDGPU/bswap.ll vendor/llvm/dist/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll vendor/llvm/dist/test/CodeGen/AMDGPU/cgp-addressing-modes.ll vendor/llvm/dist/test/CodeGen/AMDGPU/clamp-omod-special-case.mir vendor/llvm/dist/test/CodeGen/AMDGPU/coalescer_remat.ll vendor/llvm/dist/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir vendor/llvm/dist/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll vendor/llvm/dist/test/CodeGen/AMDGPU/copy-illegal-type.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ctlz.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ctlz_zero_undef.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ctpop.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ctpop64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/cttz_zero_undef.ll vendor/llvm/dist/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll vendor/llvm/dist/test/CodeGen/AMDGPU/detect-dead-lanes.mir vendor/llvm/dist/test/CodeGen/AMDGPU/ds_read2.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ds_read2_superreg.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ds_read2st64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/early-if-convert-cost.ll vendor/llvm/dist/test/CodeGen/AMDGPU/early-if-convert.ll vendor/llvm/dist/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll vendor/llvm/dist/test/CodeGen/AMDGPU/extractelt-to-trunc.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fabs.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fadd.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fadd64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcanonicalize.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcanonicalize.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcmp.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcmp64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fconst64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fcopysign.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fdiv.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fdiv.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fma-combine.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fma.f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fma.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmax_legacy.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmed3.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmin_legacy.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmul.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmul64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmuladd.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmuladd.f32.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmuladd.f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fmuladd.v2f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fneg-combines.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fneg-fabs.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fneg-fabs.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fneg.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir vendor/llvm/dist/test/CodeGen/AMDGPU/fold-operands-order.mir vendor/llvm/dist/test/CodeGen/AMDGPU/fp32_to_fp16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fpext.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fptosi.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fptoui.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fptrunc.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fract.f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fract.ll vendor/llvm/dist/test/CodeGen/AMDGPU/frem.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fsqrt.f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fsqrt.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fsub.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fsub.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fsub64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ftrunc.f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/global-extload-i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/half.ll vendor/llvm/dist/test/CodeGen/AMDGPU/imm.ll vendor/llvm/dist/test/CodeGen/AMDGPU/immv216.ll vendor/llvm/dist/test/CodeGen/AMDGPU/indirect-addressing-si.ll vendor/llvm/dist/test/CodeGen/AMDGPU/inline-asm.ll vendor/llvm/dist/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.ceil.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.cos.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.exp2.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.floor.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.fma.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.log2.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.minnum.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.rint.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.round.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.sin.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.trunc.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-f32.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-f64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-i32.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-i64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-global-i8.ll vendor/llvm/dist/test/CodeGen/AMDGPU/load-weird-sizes.ll vendor/llvm/dist/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll vendor/llvm/dist/test/CodeGen/AMDGPU/mad-combine.ll vendor/llvm/dist/test/CodeGen/AMDGPU/madak.ll vendor/llvm/dist/test/CodeGen/AMDGPU/madmk.ll vendor/llvm/dist/test/CodeGen/AMDGPU/max.ll vendor/llvm/dist/test/CodeGen/AMDGPU/merge-stores.ll vendor/llvm/dist/test/CodeGen/AMDGPU/mubuf.ll vendor/llvm/dist/test/CodeGen/AMDGPU/mul.ll vendor/llvm/dist/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll vendor/llvm/dist/test/CodeGen/AMDGPU/no-shrink-extloads.ll vendor/llvm/dist/test/CodeGen/AMDGPU/or.ll vendor/llvm/dist/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll vendor/llvm/dist/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll vendor/llvm/dist/test/CodeGen/AMDGPU/reorder-stores.ll vendor/llvm/dist/test/CodeGen/AMDGPU/rotl.i64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/rotr.i64.ll vendor/llvm/dist/test/CodeGen/AMDGPU/rsq.ll vendor/llvm/dist/test/CodeGen/AMDGPU/s_movk_i32.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sad.ll vendor/llvm/dist/test/CodeGen/AMDGPU/saddo.ll vendor/llvm/dist/test/CodeGen/AMDGPU/salu-to-valu.ll vendor/llvm/dist/test/CodeGen/AMDGPU/scalar_to_vector.ll vendor/llvm/dist/test/CodeGen/AMDGPU/schedule-global-loads.ll vendor/llvm/dist/test/CodeGen/AMDGPU/scratch-buffer.ll vendor/llvm/dist/test/CodeGen/AMDGPU/scratch-simple.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sdiv.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sdwa-peephole.ll vendor/llvm/dist/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll vendor/llvm/dist/test/CodeGen/AMDGPU/select-vectors.ll vendor/llvm/dist/test/CodeGen/AMDGPU/select.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/setcc-fneg-constant.ll vendor/llvm/dist/test/CodeGen/AMDGPU/setcc.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sext-in-reg.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sgpr-copy.ll vendor/llvm/dist/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll vendor/llvm/dist/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll vendor/llvm/dist/test/CodeGen/AMDGPU/shift-i64-opts.ll vendor/llvm/dist/test/CodeGen/AMDGPU/shl.ll vendor/llvm/dist/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir vendor/llvm/dist/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sign_extend.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sitofp.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sminmax.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sminmax.v2i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/spill-cfg-position.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sra.ll vendor/llvm/dist/test/CodeGen/AMDGPU/srem.ll vendor/llvm/dist/test/CodeGen/AMDGPU/srl.ll vendor/llvm/dist/test/CodeGen/AMDGPU/ssubo.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sub.i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sub.ll vendor/llvm/dist/test/CodeGen/AMDGPU/sub.v2i16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll vendor/llvm/dist/test/CodeGen/AMDGPU/trunc.ll vendor/llvm/dist/test/CodeGen/AMDGPU/uaddo.ll vendor/llvm/dist/test/CodeGen/AMDGPU/udiv.ll vendor/llvm/dist/test/CodeGen/AMDGPU/uitofp.f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/urem.ll vendor/llvm/dist/test/CodeGen/AMDGPU/usubo.ll vendor/llvm/dist/test/CodeGen/AMDGPU/v_cndmask.ll vendor/llvm/dist/test/CodeGen/AMDGPU/v_mac.ll vendor/llvm/dist/test/CodeGen/AMDGPU/v_mac_f16.ll vendor/llvm/dist/test/CodeGen/AMDGPU/vectorize-global-local.ll vendor/llvm/dist/test/CodeGen/AMDGPU/vselect.ll vendor/llvm/dist/test/CodeGen/AMDGPU/waitcnt-permute.mir vendor/llvm/dist/test/CodeGen/AMDGPU/xor.ll vendor/llvm/dist/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll vendor/llvm/dist/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-instruction-select-cmp.mir vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir vendor/llvm/dist/test/CodeGen/ARM/arguments-nosplit-double.ll vendor/llvm/dist/test/CodeGen/ARM/arguments-nosplit-i64.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-ldm.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-stm-wrback.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-vfma.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-vldm.ll vendor/llvm/dist/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll vendor/llvm/dist/test/CodeGen/ARM/fence-singlethread.ll vendor/llvm/dist/test/CodeGen/AVR/ctlz.ll vendor/llvm/dist/test/CodeGen/AVR/cttz.ll vendor/llvm/dist/test/CodeGen/AVR/pseudo/ANDIWRdK.mir vendor/llvm/dist/test/CodeGen/AVR/pseudo/COMWRd.mir vendor/llvm/dist/test/CodeGen/AVR/pseudo/ORIWRdK.mir vendor/llvm/dist/test/CodeGen/AVR/pseudo/SBCIWRdK.mir vendor/llvm/dist/test/CodeGen/AVR/pseudo/SUBIWRdK.mir vendor/llvm/dist/test/CodeGen/AVR/select-mbb-placement-bug.ll vendor/llvm/dist/test/CodeGen/BPF/undef.ll vendor/llvm/dist/test/CodeGen/Hexagon/convertdptoint.ll vendor/llvm/dist/test/CodeGen/Hexagon/convertdptoll.ll vendor/llvm/dist/test/CodeGen/Hexagon/convertsptoint.ll vendor/llvm/dist/test/CodeGen/Hexagon/convertsptoll.ll vendor/llvm/dist/test/CodeGen/Hexagon/dadd.ll vendor/llvm/dist/test/CodeGen/Hexagon/dmul.ll vendor/llvm/dist/test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll vendor/llvm/dist/test/CodeGen/Hexagon/dsub.ll vendor/llvm/dist/test/CodeGen/Hexagon/fadd.ll vendor/llvm/dist/test/CodeGen/Hexagon/fmul.ll vendor/llvm/dist/test/CodeGen/Hexagon/fsub.ll vendor/llvm/dist/test/CodeGen/MIR/AArch64/atomic-memoperands.mir vendor/llvm/dist/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir vendor/llvm/dist/test/CodeGen/MIR/Generic/runPass.mir vendor/llvm/dist/test/CodeGen/MSP430/Inst16mm.ll vendor/llvm/dist/test/CodeGen/NVPTX/lower-aggr-copies.ll vendor/llvm/dist/test/CodeGen/PowerPC/atomics-regression.ll vendor/llvm/dist/test/CodeGen/PowerPC/build-vector-tests.ll vendor/llvm/dist/test/CodeGen/PowerPC/ppc64le-smallarg.ll vendor/llvm/dist/test/CodeGen/PowerPC/svr4-redzone.ll vendor/llvm/dist/test/CodeGen/PowerPC/tailcall1-64.ll vendor/llvm/dist/test/CodeGen/PowerPC/vec_int_ext.ll vendor/llvm/dist/test/CodeGen/PowerPC/vsx-partword-int-loads-and-stores.ll vendor/llvm/dist/test/CodeGen/Thumb2/ifcvt-no-branch-predictor.ll vendor/llvm/dist/test/CodeGen/X86/2012-08-16-setcc.ll vendor/llvm/dist/test/CodeGen/X86/GC/badreadproto.ll vendor/llvm/dist/test/CodeGen/X86/GC/badrootproto.ll vendor/llvm/dist/test/CodeGen/X86/GC/badwriteproto.ll vendor/llvm/dist/test/CodeGen/X86/GC/fat.ll vendor/llvm/dist/test/CodeGen/X86/GC/outside.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/add-vec.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/constant.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/ext-x86-64.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/ext.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-ext.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-scalar.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-constant.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-ext.mir vendor/llvm/dist/test/CodeGen/X86/avg.ll vendor/llvm/dist/test/CodeGen/X86/avx-cmp.ll vendor/llvm/dist/test/CodeGen/X86/avx-load-store.ll vendor/llvm/dist/test/CodeGen/X86/avx-schedule.ll vendor/llvm/dist/test/CodeGen/X86/avx-unpack.ll vendor/llvm/dist/test/CodeGen/X86/avx-vinsertf128.ll vendor/llvm/dist/test/CodeGen/X86/avx2-vbroadcast.ll vendor/llvm/dist/test/CodeGen/X86/avx512-cmp.ll vendor/llvm/dist/test/CodeGen/X86/avx512-insert-extract.ll vendor/llvm/dist/test/CodeGen/X86/avx512-vec-cmp.ll vendor/llvm/dist/test/CodeGen/X86/avx512vl-vec-cmp.ll vendor/llvm/dist/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-and-setcc-128.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-and-setcc-256.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-setcc-128.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-setcc-256.ll vendor/llvm/dist/test/CodeGen/X86/block-placement.ll vendor/llvm/dist/test/CodeGen/X86/bool-simplify.ll vendor/llvm/dist/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll vendor/llvm/dist/test/CodeGen/X86/bswap-wide-int.ll vendor/llvm/dist/test/CodeGen/X86/build-vector-128.ll vendor/llvm/dist/test/CodeGen/X86/build-vector-256.ll vendor/llvm/dist/test/CodeGen/X86/build-vector-512.ll vendor/llvm/dist/test/CodeGen/X86/cast-vsel.ll vendor/llvm/dist/test/CodeGen/X86/clear_upper_vector_element_bits.ll vendor/llvm/dist/test/CodeGen/X86/cmov.ll vendor/llvm/dist/test/CodeGen/X86/code_placement_cold_loop_blocks.ll vendor/llvm/dist/test/CodeGen/X86/combine-avx-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/combine-avx2-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/combine-sse41-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/constant-hoisting-bfi.ll vendor/llvm/dist/test/CodeGen/X86/element-wise-atomic-memory-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/extract-store.ll vendor/llvm/dist/test/CodeGen/X86/extractelement-legalization-store-ordering.ll vendor/llvm/dist/test/CodeGen/X86/fast-isel-abort-warm.ll vendor/llvm/dist/test/CodeGen/X86/fp128-i128.ll vendor/llvm/dist/test/CodeGen/X86/gather-addresses.ll vendor/llvm/dist/test/CodeGen/X86/half.ll vendor/llvm/dist/test/CodeGen/X86/illegal-bitfield-loadstore.ll vendor/llvm/dist/test/CodeGen/X86/optimize-max-1.ll vendor/llvm/dist/test/CodeGen/X86/optimize-max-2.ll vendor/llvm/dist/test/CodeGen/X86/pr15309.ll vendor/llvm/dist/test/CodeGen/X86/pr23603.ll vendor/llvm/dist/test/CodeGen/X86/rdrand.ll vendor/llvm/dist/test/CodeGen/X86/rdseed.ll vendor/llvm/dist/test/CodeGen/X86/recip-fastmath.ll vendor/llvm/dist/test/CodeGen/X86/recip-fastmath2.ll vendor/llvm/dist/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll vendor/llvm/dist/test/CodeGen/X86/rotate4.ll vendor/llvm/dist/test/CodeGen/X86/sbb.ll vendor/llvm/dist/test/CodeGen/X86/select_const.ll vendor/llvm/dist/test/CodeGen/X86/shift-codegen.ll vendor/llvm/dist/test/CodeGen/X86/shift-folding.ll vendor/llvm/dist/test/CodeGen/X86/shuffle-vs-trunc-256.ll vendor/llvm/dist/test/CodeGen/X86/shuffle-vs-trunc-512.ll vendor/llvm/dist/test/CodeGen/X86/sink-blockfreq.ll vendor/llvm/dist/test/CodeGen/X86/sse-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse2-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse3-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse41-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse42-schedule.ll vendor/llvm/dist/test/CodeGen/X86/ssse3-schedule.ll vendor/llvm/dist/test/CodeGen/X86/swizzle-avx2.ll vendor/llvm/dist/test/CodeGen/X86/tbm_patterns.ll vendor/llvm/dist/test/CodeGen/X86/vec-copysign.ll vendor/llvm/dist/test/CodeGen/X86/vec_return.ll vendor/llvm/dist/test/CodeGen/X86/vec_shift6.ll vendor/llvm/dist/test/CodeGen/X86/vec_unsafe-fp-math.ll vendor/llvm/dist/test/CodeGen/X86/vector-popcnt-128.ll vendor/llvm/dist/test/CodeGen/X86/vector-popcnt-256.ll vendor/llvm/dist/test/CodeGen/X86/vector-popcnt-512.ll vendor/llvm/dist/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll vendor/llvm/dist/test/CodeGen/X86/vector-shuffle-sse4a.ll vendor/llvm/dist/test/CodeGen/X86/vector-truncate-combine.ll vendor/llvm/dist/test/CodeGen/X86/vector-tzcnt-128.ll vendor/llvm/dist/test/CodeGen/X86/vector-tzcnt-256.ll vendor/llvm/dist/test/CodeGen/X86/vector-tzcnt-512.ll vendor/llvm/dist/test/CodeGen/X86/wide-integer-cmp.ll vendor/llvm/dist/test/CodeGen/X86/x32-lea-1.ll vendor/llvm/dist/test/CodeGen/X86/x86-interleaved-access.ll vendor/llvm/dist/test/CodeGen/X86/zext-shl.ll vendor/llvm/dist/test/CodeGen/X86/zext-trunc.ll vendor/llvm/dist/test/DebugInfo/COFF/asm.ll vendor/llvm/dist/test/DebugInfo/COFF/cpp-mangling.ll vendor/llvm/dist/test/DebugInfo/COFF/fp-stack.ll vendor/llvm/dist/test/DebugInfo/COFF/globals.ll vendor/llvm/dist/test/DebugInfo/COFF/inlining-files.ll vendor/llvm/dist/test/DebugInfo/COFF/inlining-header.ll vendor/llvm/dist/test/DebugInfo/COFF/inlining-levels.ll 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vendor/llvm/dist/test/DebugInfo/PDB/pdbdump-mergetypes.test vendor/llvm/dist/test/DebugInfo/X86/dbg-declare-inalloca.ll vendor/llvm/dist/test/DebugInfo/dwarfdump-str-offsets.test vendor/llvm/dist/test/DebugInfo/llvm-symbolizer.test vendor/llvm/dist/test/Instrumentation/ThreadSanitizer/atomic.ll vendor/llvm/dist/test/MC/AArch64/label-arithmetic-diags-elf.s vendor/llvm/dist/test/MC/AMDGPU/gfx9_asm_all.s vendor/llvm/dist/test/MC/AMDGPU/vop3p-err.s vendor/llvm/dist/test/MC/AMDGPU/vop3p.s vendor/llvm/dist/test/MC/ARM/elf-movt.s vendor/llvm/dist/test/MC/ARM/ldr-pseudo-unpredictable.s vendor/llvm/dist/test/MC/COFF/bad-expr.s vendor/llvm/dist/test/MC/COFF/cv-def-range-gap.s vendor/llvm/dist/test/MC/COFF/cv-def-range.s vendor/llvm/dist/test/MC/COFF/cv-inline-linetable-infloop.s vendor/llvm/dist/test/MC/COFF/cv-inline-linetable-unlikely.s vendor/llvm/dist/test/MC/COFF/cv-inline-linetable-unreachable.s vendor/llvm/dist/test/MC/COFF/cv-inline-linetable.s vendor/llvm/dist/test/MC/ELF/bad-expr3.s vendor/llvm/dist/test/MC/WebAssembly/external-data.ll vendor/llvm/dist/test/MC/WebAssembly/external-func-address.ll vendor/llvm/dist/test/MC/WebAssembly/unnamed-data.ll vendor/llvm/dist/test/MC/WebAssembly/weak-alias.ll vendor/llvm/dist/test/Object/Inputs/trivial.ll vendor/llvm/dist/test/Object/nm-trivial-object.test vendor/llvm/dist/test/Object/obj2yaml.test vendor/llvm/dist/test/Object/objdump-relocations.test vendor/llvm/dist/test/ObjectYAML/wasm/data_section.yaml vendor/llvm/dist/test/Other/2002-01-31-CallGraph.ll vendor/llvm/dist/test/Other/new-pm-defaults.ll vendor/llvm/dist/test/Other/new-pm-lto-defaults.ll vendor/llvm/dist/test/Other/pass-pipelines.ll vendor/llvm/dist/test/TableGen/AsmVariant.td vendor/llvm/dist/test/TableGen/GlobalISelEmitter.td vendor/llvm/dist/test/TableGen/UnterminatedComment.td vendor/llvm/dist/test/Transforms/CodeGenPrepare/X86/memcmp.ll vendor/llvm/dist/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll vendor/llvm/dist/test/Transforms/ConstantHoisting/ARM/bad-cases.ll vendor/llvm/dist/test/Transforms/ConstantHoisting/X86/ehpad.ll vendor/llvm/dist/test/Transforms/GVN/PRE/atomic.ll vendor/llvm/dist/test/Transforms/GVN/PRE/pre-gep-load.ll vendor/llvm/dist/test/Transforms/GVN/PRE/pre-load.ll vendor/llvm/dist/test/Transforms/IndVarSimplify/eliminate-comparison.ll vendor/llvm/dist/test/Transforms/IndVarSimplify/strengthen-overflow.ll vendor/llvm/dist/test/Transforms/IndVarSimplify/widen-loop-comp.ll vendor/llvm/dist/test/Transforms/InferAddressSpaces/AMDGPU/basic.ll vendor/llvm/dist/test/Transforms/Inline/cgscc-incremental-invalidate.ll vendor/llvm/dist/test/Transforms/InstCombine/and-or-not.ll vendor/llvm/dist/test/Transforms/InstCombine/bswap-fold.ll vendor/llvm/dist/test/Transforms/InstCombine/consecutive-fences.ll vendor/llvm/dist/test/Transforms/InstCombine/icmp.ll vendor/llvm/dist/test/Transforms/InstCombine/intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/or-xor.ll vendor/llvm/dist/test/Transforms/InstCombine/select-implied.ll vendor/llvm/dist/test/Transforms/InstCombine/select.ll vendor/llvm/dist/test/Transforms/InterleavedAccess/ARM/interleaved-accesses.ll vendor/llvm/dist/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll vendor/llvm/dist/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll vendor/llvm/dist/test/Transforms/LoopUnroll/runtime-loop.ll vendor/llvm/dist/test/Transforms/LoopVectorize/if-conversion-nest.ll vendor/llvm/dist/test/Transforms/LowerTypeTests/Inputs/import-icall.yaml vendor/llvm/dist/test/Transforms/LowerTypeTests/import-icall.ll vendor/llvm/dist/test/Transforms/PGOProfile/counter_promo_exit_merge.ll vendor/llvm/dist/test/Transforms/PGOProfile/counter_promo_mexits.ll vendor/llvm/dist/test/Transforms/SimplifyCFG/sink-common-code.ll vendor/llvm/dist/test/Transforms/Sink/fence.ll vendor/llvm/dist/test/Unit/lit.cfg vendor/llvm/dist/test/Verifier/2004-05-21-SwitchConstantMismatch.ll vendor/llvm/dist/test/Verifier/2007-12-21-InvokeParamAttrs.ll vendor/llvm/dist/test/Verifier/2008-01-11-VarargAttrs.ll vendor/llvm/dist/test/Verifier/2009-05-29-InvokeResult1.ll vendor/llvm/dist/test/Verifier/2009-05-29-InvokeResult2.ll vendor/llvm/dist/test/Verifier/2009-05-29-InvokeResult3.ll vendor/llvm/dist/test/Verifier/byval-1.ll vendor/llvm/dist/test/Verifier/element-wise-atomic-memory-intrinsics.ll vendor/llvm/dist/test/Verifier/gcread-ptrptr.ll vendor/llvm/dist/test/Verifier/gcroot-alloca.ll vendor/llvm/dist/test/Verifier/gcroot-meta.ll vendor/llvm/dist/test/Verifier/gcroot-ptrptr.ll vendor/llvm/dist/test/Verifier/gcwrite-ptrptr.ll vendor/llvm/dist/test/lit.cfg vendor/llvm/dist/test/tools/llvm-cov/zeroFunctionFile.c vendor/llvm/dist/test/tools/llvm-objdump/WebAssembly/symbol-table.test vendor/llvm/dist/test/tools/llvm-objdump/wasm.txt vendor/llvm/dist/test/tools/llvm-pdbdump/partial-type-stream.test vendor/llvm/dist/test/tools/llvm-profdata/c-general.test vendor/llvm/dist/test/tools/llvm-readobj/Inputs/trivial.ll vendor/llvm/dist/test/tools/llvm-readobj/Inputs/trivial.obj.wasm vendor/llvm/dist/test/tools/llvm-readobj/codeview-linetables.test vendor/llvm/dist/test/tools/llvm-readobj/file-headers.test vendor/llvm/dist/test/tools/llvm-readobj/relocations.test vendor/llvm/dist/test/tools/llvm-readobj/sections.test vendor/llvm/dist/test/tools/llvm-readobj/symbols.test vendor/llvm/dist/tools/gold/gold-plugin.cpp vendor/llvm/dist/tools/lli/OrcLazyJIT.cpp vendor/llvm/dist/tools/lli/OrcLazyJIT.h vendor/llvm/dist/tools/lli/RemoteJITUtils.h vendor/llvm/dist/tools/lli/lli.cpp vendor/llvm/dist/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp vendor/llvm/dist/tools/llvm-c-test/echo.cpp vendor/llvm/dist/tools/llvm-cov/CodeCoverage.cpp vendor/llvm/dist/tools/llvm-lto/llvm-lto.cpp vendor/llvm/dist/tools/llvm-objdump/llvm-objdump.cpp vendor/llvm/dist/tools/llvm-pdbutil/CMakeLists.txt vendor/llvm/dist/tools/llvm-pdbutil/Diff.cpp vendor/llvm/dist/tools/llvm-pdbutil/DumpOutputStyle.cpp vendor/llvm/dist/tools/llvm-pdbutil/FormatUtil.cpp vendor/llvm/dist/tools/llvm-pdbutil/FormatUtil.h vendor/llvm/dist/tools/llvm-pdbutil/MinimalTypeDumper.cpp vendor/llvm/dist/tools/llvm-pdbutil/StreamUtil.cpp vendor/llvm/dist/tools/llvm-pdbutil/StreamUtil.h vendor/llvm/dist/tools/llvm-pdbutil/llvm-pdbutil.cpp vendor/llvm/dist/tools/llvm-pdbutil/llvm-pdbutil.h vendor/llvm/dist/tools/llvm-profdata/llvm-profdata.cpp vendor/llvm/dist/tools/llvm-readobj/COFFDumper.cpp vendor/llvm/dist/tools/llvm-readobj/WasmDumper.cpp vendor/llvm/dist/tools/llvm-shlib/CMakeLists.txt vendor/llvm/dist/tools/llvm-stress/llvm-stress.cpp vendor/llvm/dist/tools/obj2yaml/wasm2yaml.cpp vendor/llvm/dist/tools/opt/NewPMDriver.cpp vendor/llvm/dist/tools/sanstats/sanstats.cpp vendor/llvm/dist/tools/yaml2obj/yaml2wasm.cpp vendor/llvm/dist/unittests/ADT/APFloatTest.cpp vendor/llvm/dist/unittests/ADT/FunctionRefTest.cpp vendor/llvm/dist/unittests/Analysis/AliasAnalysisTest.cpp vendor/llvm/dist/unittests/Analysis/CGSCCPassManagerTest.cpp vendor/llvm/dist/unittests/Analysis/LazyCallGraphTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/CompileOnDemandLayerTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/GlobalMappingLayerTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/LazyEmittingLayerTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/ObjectTransformLayerTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/OrcTestCommon.h vendor/llvm/dist/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp vendor/llvm/dist/unittests/IR/CMakeLists.txt vendor/llvm/dist/unittests/IR/ModuleTest.cpp vendor/llvm/dist/unittests/IR/PassManagerTest.cpp vendor/llvm/dist/unittests/ProfileData/CMakeLists.txt vendor/llvm/dist/unittests/ProfileData/CoverageMappingTest.cpp vendor/llvm/dist/unittests/ProfileData/InstrProfTest.cpp vendor/llvm/dist/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp vendor/llvm/dist/unittests/Support/ErrorTest.cpp vendor/llvm/dist/unittests/Support/Host.cpp vendor/llvm/dist/unittests/Support/MathExtrasTest.cpp vendor/llvm/dist/unittests/Transforms/Utils/Cloning.cpp vendor/llvm/dist/utils/TableGen/AsmMatcherEmitter.cpp vendor/llvm/dist/utils/TableGen/AsmWriterEmitter.cpp vendor/llvm/dist/utils/TableGen/CodeEmitterGen.cpp vendor/llvm/dist/utils/TableGen/CodeGenInstruction.h vendor/llvm/dist/utils/TableGen/CodeGenMapTable.cpp vendor/llvm/dist/utils/TableGen/CodeGenTarget.cpp vendor/llvm/dist/utils/TableGen/CodeGenTarget.h vendor/llvm/dist/utils/TableGen/DAGISelMatcherGen.cpp vendor/llvm/dist/utils/TableGen/FastISelEmitter.cpp vendor/llvm/dist/utils/TableGen/FixedLenDecoderEmitter.cpp vendor/llvm/dist/utils/TableGen/GlobalISelEmitter.cpp vendor/llvm/dist/utils/TableGen/InstrInfoEmitter.cpp vendor/llvm/dist/utils/TableGen/RegisterBankEmitter.cpp vendor/llvm/dist/utils/TableGen/SearchableTableEmitter.cpp vendor/llvm/dist/utils/TableGen/SubtargetEmitter.cpp vendor/llvm/dist/utils/TableGen/X86DisassemblerTables.cpp vendor/llvm/dist/utils/TableGen/X86DisassemblerTables.h vendor/llvm/dist/utils/TableGen/X86ModRMFilters.h vendor/llvm/dist/utils/TableGen/X86RecognizableInstr.cpp vendor/llvm/dist/utils/TableGen/X86RecognizableInstr.h vendor/llvm/dist/utils/docker/build_docker_image.sh vendor/llvm/dist/utils/docker/scripts/build_install_llvm.sh vendor/llvm/dist/utils/lit/lit/TestRunner.py vendor/llvm/dist/utils/lit/lit/formats/googletest.py vendor/llvm/dist/utils/lit/lit/main.py vendor/llvm/dist/utils/lit/tests/selecting.py vendor/llvm/dist/utils/vim/syntax/llvm.vim Modified: vendor/llvm/dist/CMakeLists.txt ============================================================================== --- vendor/llvm/dist/CMakeLists.txt Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/CMakeLists.txt Thu Jul 13 19:25:18 2017 (r320957) @@ -288,6 +288,10 @@ set(LLVM_LIBDIR_SUFFIX "" CACHE STRING "Define suffix set(LLVM_TOOLS_INSTALL_DIR "bin" CACHE STRING "Path for binary subdirectory (defaults to 'bin')") mark_as_advanced(LLVM_TOOLS_INSTALL_DIR) +set(LLVM_UTILS_INSTALL_DIR "bin" CACHE STRING + "Path to install LLVM utilities (enabled by LLVM_INSTALL_UTILS=ON) (defaults to LLVM_TOOLS_INSTALL_DIR)") +mark_as_advanced(LLVM_TOOLS_INSTALL_DIR) + # They are used as destination of target generators. set(LLVM_RUNTIME_OUTPUT_INTDIR ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}/bin) set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}/lib${LLVM_LIBDIR_SUFFIX}) Modified: vendor/llvm/dist/cmake/modules/AddLLVM.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/AddLLVM.cmake Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/cmake/modules/AddLLVM.cmake Thu Jul 13 19:25:18 2017 (r320957) @@ -91,7 +91,7 @@ function(add_llvm_symbol_exports target_name export_fi DEPENDS ${export_file} VERBATIM COMMENT "Creating export file for ${target_name}") - if (${CMAKE_SYSTEM_NAME} MATCHES "SunOS") + if (${LLVM_LINKER_IS_SOLARISLD}) set_property(TARGET ${target_name} APPEND_STRING PROPERTY LINK_FLAGS " -Wl,-M,${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}") else() @@ -148,13 +148,28 @@ function(add_llvm_symbol_exports target_name export_fi endfunction(add_llvm_symbol_exports) if(NOT WIN32 AND NOT APPLE) + # Detect what linker we have here execute_process( COMMAND ${CMAKE_C_COMPILER} -Wl,--version OUTPUT_VARIABLE stdout - ERROR_QUIET + ERROR_VARIABLE stderr ) + set(LLVM_LINKER_DETECTED ON) if("${stdout}" MATCHES "GNU gold") set(LLVM_LINKER_IS_GOLD ON) + message(STATUS "Linker detection: GNU Gold") + elseif("${stdout}" MATCHES "^LLD") + set(LLVM_LINKER_IS_LLD ON) + message(STATUS "Linker detection: LLD") + elseif("${stdout}" MATCHES "GNU ld") + set(LLVM_LINKER_IS_GNULD ON) + message(STATUS "Linker detection: GNU ld") + elseif("${stderr}" MATCHES "Solaris Link Editors") + set(LLVM_LINKER_IS_SOLARISLD ON) + message(STATUS "Linker detection: Solaris ld") + else() + set(LLVM_LINKER_DETECTED OFF) + message(STATUS "Linker detection: unknown") endif() endif() @@ -865,7 +880,7 @@ macro(add_llvm_utility name) set_target_properties(${name} PROPERTIES FOLDER "Utils") if( LLVM_INSTALL_UTILS AND LLVM_BUILD_UTILS ) install (TARGETS ${name} - RUNTIME DESTINATION bin + RUNTIME DESTINATION ${LLVM_UTILS_INSTALL_DIR} COMPONENT ${name}) if (NOT CMAKE_CONFIGURATION_TYPES) add_custom_target(install-${name} @@ -1159,11 +1174,6 @@ function(add_lit_target target comment) list(APPEND LIT_ARGS --param build_mode=${CMAKE_CFG_INTDIR}) endif () if (EXISTS ${LLVM_MAIN_SRC_DIR}/utils/lit/lit.py) - # reset cache after erraneous r283029 - # TODO: remove this once all buildbots run - if (LIT_COMMAND STREQUAL "${PYTHON_EXECUTABLE} ${LLVM_MAIN_SRC_DIR}/utils/lit/lit.py") - unset(LIT_COMMAND CACHE) - endif() set (LIT_COMMAND "${PYTHON_EXECUTABLE};${LLVM_MAIN_SRC_DIR}/utils/lit/lit.py" CACHE STRING "Command used to spawn llvm-lit") else() Modified: vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Thu Jul 13 19:25:18 2017 (r320957) @@ -686,8 +686,8 @@ endif() # lld doesn't print colored diagnostics when invoked from Ninja if (UNIX AND CMAKE_GENERATOR STREQUAL "Ninja") include(CheckLinkerFlag) - check_linker_flag("-Wl,-color-diagnostics" LINKER_SUPPORTS_COLOR_DIAGNOSTICS) - append_if(LINKER_SUPPORTS_COLOR_DIAGNOSTICS "-Wl,-color-diagnostics" + check_linker_flag("-Wl,--color-diagnostics" LINKER_SUPPORTS_COLOR_DIAGNOSTICS) + append_if(LINKER_SUPPORTS_COLOR_DIAGNOSTICS "-Wl,--color-diagnostics" CMAKE_EXE_LINKER_FLAGS CMAKE_MODULE_LINKER_FLAGS CMAKE_SHARED_LINKER_FLAGS) endif() Modified: vendor/llvm/dist/cmake/modules/LLVMExternalProjectUtils.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/LLVMExternalProjectUtils.cmake Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/cmake/modules/LLVMExternalProjectUtils.cmake Thu Jul 13 19:25:18 2017 (r320957) @@ -195,8 +195,16 @@ function(llvm_ExternalProject_Add name source_dir) # Add top-level targets foreach(target ${ARG_EXTRA_TARGETS}) + string(REPLACE ":" ";" target_list ${target}) + list(GET target_list 0 target) + list(LENGTH target_list target_list_len) + if(${target_list_len} GREATER 1) + list(GET target_list 1 target_name) + else() + set(target_name "${target}") + endif() llvm_ExternalProject_BuildCmd(build_runtime_cmd ${target} ${BINARY_DIR}) - add_custom_target(${target} + add_custom_target(${target_name} COMMAND ${build_runtime_cmd} DEPENDS ${name}-configure WORKING_DIRECTORY ${BINARY_DIR} Modified: vendor/llvm/dist/docs/AMDGPUUsage.rst ============================================================================== --- vendor/llvm/dist/docs/AMDGPUUsage.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/AMDGPUUsage.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -190,9 +190,7 @@ names from both the *Processor* and *Alternative Proce gfx810 - stoney amdgcn APU **GCN GFX9** -------------------------------------------------------------------- - gfx900 amdgcn dGPU - FirePro W9500 - - FirePro S9500 - - FirePro S9500x2 + gfx900 amdgcn dGPU - Radeon Vega Frontier Edition gfx901 amdgcn dGPU ROCm Same as gfx900 except XNACK is enabled Modified: vendor/llvm/dist/docs/CMake.rst ============================================================================== --- vendor/llvm/dist/docs/CMake.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/CMake.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -536,6 +536,11 @@ LLVM-specific variables during the build. Enabling this option can significantly speed up build times especially when building LLVM in Debug configurations. +**LLVM_REVERSE_ITERATION**:BOOL + If enabled, all supported unordered llvm containers would be iterated in + reverse order. This is useful for uncovering non-determinism caused by + iteration of unordered containers. + CMake Caches ============ Modified: vendor/llvm/dist/docs/CMakePrimer.rst ============================================================================== --- vendor/llvm/dist/docs/CMakePrimer.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/CMakePrimer.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -112,33 +112,6 @@ In this example the ``extra_sources`` variable is only targeting an Apple platform. For all other targets the ``extra_sources`` will be evaluated as empty before add_executable is given its arguments. -One big "Gotcha" with variable dereferencing is that ``if`` commands implicitly -dereference values. This has some unexpected results. For example: - -.. code-block:: cmake - - if("${SOME_VAR}" STREQUAL "MSVC") - -In this code sample MSVC will be implicitly dereferenced, which will result in -the if command comparing the value of the dereferenced variables ``SOME_VAR`` -and ``MSVC``. A common workaround to this solution is to prepend strings being -compared with an ``x``. - -.. code-block:: cmake - - if("x${SOME_VAR}" STREQUAL "xMSVC") - -This works because while ``MSVC`` is a defined variable, ``xMSVC`` is not. This -pattern is uncommon, but it does occur in LLVM's CMake scripts. - -.. note:: - - Once the LLVM project upgrades its minimum CMake version to 3.1 or later we - can prevent this behavior by setting CMP0054 to new. For more information on - CMake policies please see the cmake-policies manpage or the `cmake-policies - online documentation - <https://cmake.org/cmake/help/v3.4/manual/cmake-policies.7.html>`_. - Lists ----- Modified: vendor/llvm/dist/docs/CommandGuide/lit.rst ============================================================================== --- vendor/llvm/dist/docs/CommandGuide/lit.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/CommandGuide/lit.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -169,6 +169,13 @@ SELECTION OPTIONS must be in the range ``1..M``. The environment variable ``LIT_RUN_SHARD`` can also be used in place of this option. +.. option:: --filter=REGEXP + + Run only those tests whose name matches the regular expression specified in + ``REGEXP``. The environment variable ``LIT_FILTER`` can be also used in place + of this option, which is especially useful in environments where the call + to ``lit`` is issued indirectly. + ADDITIONAL OPTIONS ------------------ Modified: vendor/llvm/dist/docs/CommandGuide/llvm-cov.rst ============================================================================== --- vendor/llvm/dist/docs/CommandGuide/llvm-cov.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/CommandGuide/llvm-cov.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -262,6 +262,12 @@ OPTIONS The demangler is expected to read a newline-separated list of symbols from stdin and write a newline-separated list of the same length to stdout. +.. option:: -num-threads=N, -j=N + + Use N threads to write file reports (only applicable when -output-dir is + specified). When N=0, llvm-cov auto-detects an appropriate number of threads to + use. This is the default. + .. option:: -line-coverage-gt=<N> Show code coverage only for functions with line coverage greater than the Modified: vendor/llvm/dist/docs/CommandGuide/llvm-profdata.rst ============================================================================== --- vendor/llvm/dist/docs/CommandGuide/llvm-profdata.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/CommandGuide/llvm-profdata.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -192,6 +192,12 @@ OPTIONS information is dumped in a more human readable form (also in text) with annotations. +.. option:: -topn=n + + Instruct the profile dumper to show the top ``n`` functions with the + hottest basic blocks in the summary section. By default, the topn functions + are not dumped. + .. option:: -sample Specify that the input profile is a sample-based profile. Modified: vendor/llvm/dist/docs/Coroutines.rst ============================================================================== --- vendor/llvm/dist/docs/Coroutines.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/Coroutines.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -846,7 +846,7 @@ Overview: """"""""" The '``llvm.coro.alloc``' intrinsic returns `true` if dynamic allocation is -required to obtain a memory for the corutine frame and `false` otherwise. +required to obtain a memory for the coroutine frame and `false` otherwise. Arguments: """""""""" Modified: vendor/llvm/dist/docs/Docker.rst ============================================================================== --- vendor/llvm/dist/docs/Docker.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/Docker.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -88,15 +88,11 @@ compiled by the system compiler in the debian8 image: ./llvm/utils/docker/build_docker_image.sh \ --source debian8 \ --docker-repository clang-debian8 --docker-tag "staging" \ - -- \ -p clang -i install-clang -i install-clang-headers \ -- \ -DCMAKE_BUILD_TYPE=Release -Note there are two levels of ``--`` indirection. First one separates -``build_docker_image.sh`` arguments from ``llvm/utils/build_install_llvm.sh`` -arguments. Second one separates CMake arguments from ``build_install_llvm.sh`` -arguments. Note that build like that doesn't use a 2-stage build process that +Note that a build like that doesn't use a 2-stage build process that you probably want for clang. Running a 2-stage build is a little more intricate, this command will do that: @@ -108,7 +104,6 @@ this command will do that: ./build_docker_image.sh \ --source debian8 \ --docker-repository clang-debian8 --docker-tag "staging" \ - -- \ -p clang -i stage2-install-clang -i stage2-install-clang-headers \ -- \ -DLLVM_TARGETS_TO_BUILD=Native -DCMAKE_BUILD_TYPE=Release \ @@ -178,7 +173,6 @@ debian8-based image using the latest ``google/stable`` ./llvm/utils/docker/build_docker_image.sh \ -s debian8 --d clang-debian8 -t "staging" \ - -- \ --branch branches/google/stable \ -p clang -i install-clang -i install-clang-headers \ -- \ Modified: vendor/llvm/dist/docs/HowToAddABuilder.rst ============================================================================== --- vendor/llvm/dist/docs/HowToAddABuilder.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/HowToAddABuilder.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -62,6 +62,9 @@ Here are the steps you can follow to do so: lab.llvm.org:9990 \ <buildslave-access-name> <buildslave-access-password> + To point a slave to silent master please use lab.llvm.org:9994 instead + of lab.llvm.org:9990. + #. Fill the buildslave description and admin name/e-mail. Here is an example of the buildslave description:: Modified: vendor/llvm/dist/docs/LangRef.rst ============================================================================== --- vendor/llvm/dist/docs/LangRef.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/LangRef.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -2209,13 +2209,22 @@ For a simpler introduction to the ordering constraints same address in this global order. This corresponds to the C++0x/C1x ``memory_order_seq_cst`` and Java volatile. -.. _singlethread: +.. _syncscope: -If an atomic operation is marked ``singlethread``, it only *synchronizes -with* or participates in modification and seq\_cst total orderings with -other operations running in the same thread (for example, in signal -handlers). +If an atomic operation is marked ``syncscope("singlethread")``, it only +*synchronizes with* and only participates in the seq\_cst total orderings of +other operations running in the same thread (for example, in signal handlers). +If an atomic operation is marked ``syncscope("<target-scope>")``, where +``<target-scope>`` is a target specific synchronization scope, then it is target +dependent if it *synchronizes with* and participates in the seq\_cst total +orderings of other operations. + +Otherwise, an atomic operation that is not marked ``syncscope("singlethread")`` +or ``syncscope("<target-scope>")`` *synchronizes with* and participates in the +seq\_cst total orderings of other operations that are not marked +``syncscope("singlethread")`` or ``syncscope("<target-scope>")``. + .. _fastmath: Fast-Math Flags @@ -5034,7 +5043,7 @@ which is the string ``llvm.loop.licm_versioning.disabl Loop distribution allows splitting a loop into multiple loops. Currently, this is only performed if the entire loop cannot be vectorized due to unsafe -memory dependencies. The transformation will atempt to isolate the unsafe +memory dependencies. The transformation will attempt to isolate the unsafe dependencies into their own loop. This metadata can be used to selectively enable or disable distribution of the @@ -7380,7 +7389,7 @@ Syntax: :: <result> = load [volatile] <ty>, <ty>* <pointer>[, align <alignment>][, !nontemporal !<index>][, !invariant.load !<index>][, !invariant.group !<index>][, !nonnull !<index>][, !dereferenceable !<deref_bytes_node>][, !dereferenceable_or_null !<deref_bytes_node>][, !align !<align_node>] - <result> = load atomic [volatile] <ty>, <ty>* <pointer> [singlethread] <ordering>, align <alignment> [, !invariant.group !<index>] + <result> = load atomic [volatile] <ty>, <ty>* <pointer> [syncscope("<target-scope>")] <ordering>, align <alignment> [, !invariant.group !<index>] !<index> = !{ i32 1 } !<deref_bytes_node> = !{i64 <dereferenceable_bytes>} !<align_node> = !{ i64 <value_alignment> } @@ -7401,14 +7410,14 @@ modify the number or order of execution of this ``load :ref:`volatile operations <volatile>`. If the ``load`` is marked as ``atomic``, it takes an extra :ref:`ordering -<ordering>` and optional ``singlethread`` argument. The ``release`` and -``acq_rel`` orderings are not valid on ``load`` instructions. Atomic loads -produce :ref:`defined <memmodel>` results when they may see multiple atomic -stores. The type of the pointee must be an integer, pointer, or floating-point -type whose bit width is a power of two greater than or equal to eight and less -than or equal to a target-specific size limit. ``align`` must be explicitly -specified on atomic loads, and the load has undefined behavior if the alignment -is not set to a value which is at least the size in bytes of the +<ordering>` and optional ``syncscope("<target-scope>")`` argument. The +``release`` and ``acq_rel`` orderings are not valid on ``load`` instructions. +Atomic loads produce :ref:`defined <memmodel>` results when they may see +multiple atomic stores. The type of the pointee must be an integer, pointer, or +floating-point type whose bit width is a power of two greater than or equal to +eight and less than or equal to a target-specific size limit. ``align`` must be +explicitly specified on atomic loads, and the load has undefined behavior if the +alignment is not set to a value which is at least the size in bytes of the pointee. ``!nontemporal`` does not have any defined semantics for atomic loads. The optional constant ``align`` argument specifies the alignment of the @@ -7509,7 +7518,7 @@ Syntax: :: store [volatile] <ty> <value>, <ty>* <pointer>[, align <alignment>][, !nontemporal !<index>][, !invariant.group !<index>] ; yields void - store atomic [volatile] <ty> <value>, <ty>* <pointer> [singlethread] <ordering>, align <alignment> [, !invariant.group !<index>] ; yields void + store atomic [volatile] <ty> <value>, <ty>* <pointer> [syncscope("<target-scope>")] <ordering>, align <alignment> [, !invariant.group !<index>] ; yields void Overview: """"""""" @@ -7529,14 +7538,14 @@ allowed to modify the number or order of execution of structural type <t_opaque>`) can be stored. If the ``store`` is marked as ``atomic``, it takes an extra :ref:`ordering -<ordering>` and optional ``singlethread`` argument. The ``acquire`` and -``acq_rel`` orderings aren't valid on ``store`` instructions. Atomic loads -produce :ref:`defined <memmodel>` results when they may see multiple atomic -stores. The type of the pointee must be an integer, pointer, or floating-point -type whose bit width is a power of two greater than or equal to eight and less -than or equal to a target-specific size limit. ``align`` must be explicitly -specified on atomic stores, and the store has undefined behavior if the -alignment is not set to a value which is at least the size in bytes of the +<ordering>` and optional ``syncscope("<target-scope>")`` argument. The +``acquire`` and ``acq_rel`` orderings aren't valid on ``store`` instructions. +Atomic loads produce :ref:`defined <memmodel>` results when they may see +multiple atomic stores. The type of the pointee must be an integer, pointer, or +floating-point type whose bit width is a power of two greater than or equal to +eight and less than or equal to a target-specific size limit. ``align`` must be +explicitly specified on atomic stores, and the store has undefined behavior if +the alignment is not set to a value which is at least the size in bytes of the pointee. ``!nontemporal`` does not have any defined semantics for atomic stores. The optional constant ``align`` argument specifies the alignment of the @@ -7597,7 +7606,7 @@ Syntax: :: - fence [singlethread] <ordering> ; yields void + fence [syncscope("<target-scope>")] <ordering> ; yields void Overview: """"""""" @@ -7631,17 +7640,17 @@ A ``fence`` which has ``seq_cst`` ordering, in additio ``acquire`` and ``release`` semantics specified above, participates in the global program order of other ``seq_cst`` operations and/or fences. -The optional ":ref:`singlethread <singlethread>`" argument specifies -that the fence only synchronizes with other fences in the same thread. -(This is useful for interacting with signal handlers.) +A ``fence`` instruction can also take an optional +":ref:`syncscope <syncscope>`" argument. Example: """""""" .. code-block:: llvm - fence acquire ; yields void - fence singlethread seq_cst ; yields void + fence acquire ; yields void + fence syncscope("singlethread") seq_cst ; yields void + fence syncscope("agent") seq_cst ; yields void .. _i_cmpxchg: @@ -7653,7 +7662,7 @@ Syntax: :: - cmpxchg [weak] [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <success ordering> <failure ordering> ; yields { ty, i1 } + cmpxchg [weak] [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [syncscope("<target-scope>")] <success ordering> <failure ordering> ; yields { ty, i1 } Overview: """"""""" @@ -7682,10 +7691,8 @@ must be at least ``monotonic``, the ordering constrain stronger than that on success, and the failure ordering cannot be either ``release`` or ``acq_rel``. -The optional "``singlethread``" argument declares that the ``cmpxchg`` -is only atomic with respect to code (usually signal handlers) running in -the same thread as the ``cmpxchg``. Otherwise the cmpxchg is atomic with -respect to all other code in the system. +A ``cmpxchg`` instruction can also take an optional +":ref:`syncscope <syncscope>`" argument. The pointer passed into cmpxchg must have alignment greater than or equal to the size in memory of the operand. @@ -7739,7 +7746,7 @@ Syntax: :: - atomicrmw [volatile] <operation> <ty>* <pointer>, <ty> <value> [singlethread] <ordering> ; yields ty + atomicrmw [volatile] <operation> <ty>* <pointer>, <ty> <value> [syncscope("<target-scope>")] <ordering> ; yields ty Overview: """"""""" @@ -7773,6 +7780,9 @@ be a pointer to that type. If the ``atomicrmw`` is mar order of execution of this ``atomicrmw`` with other :ref:`volatile operations <volatile>`. +A ``atomicrmw`` instruction can also take an optional +":ref:`syncscope <syncscope>`" argument. + Semantics: """""""""" @@ -10272,6 +10282,8 @@ overlap. It copies "len" bytes of memory over. If the to be aligned to some boundary, this can be specified as the fourth argument, otherwise it should be set to 0 or 1 (both meaning no alignment). +.. _int_memmove: + '``llvm.memmove``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -10327,6 +10339,8 @@ copies "len" bytes of memory over. If the argument is aligned to some boundary, this can be specified as the fourth argument, otherwise it should be set to 0 or 1 (both meaning no alignment). +.. _int_memset: + '``llvm.memset.*``' Intrinsics ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -14168,4 +14182,154 @@ In the most general case call to the '``llvm.memcpy.el lowered to a call to the symbol ``__llvm_memcpy_element_unordered_atomic_*``. Where '*' is replaced with an actual element size. +Optimizer is allowed to inline memory copy when it's profitable to do so. + +'``llvm.memmove.element.unordered.atomic``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +This is an overloaded intrinsic. You can use +``llvm.memmove.element.unordered.atomic`` on any integer bit width and for +different address spaces. Not all targets support all bit widths however. + +:: + + declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i32(i8* <dest>, + i8* <src>, + i32 <len>, + i32 <element_size>) + declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* <dest>, + i8* <src>, + i64 <len>, + i32 <element_size>) + +Overview: +""""""""" + +The '``llvm.memmove.element.unordered.atomic.*``' intrinsic is a specialization +of the '``llvm.memmove.*``' intrinsic. It differs in that the ``dest`` and +``src`` are treated as arrays with elements that are exactly ``element_size`` +bytes, and the copy between buffers uses a sequence of +:ref:`unordered atomic <ordering>` load/store operations that are a positive +integer multiple of the ``element_size`` in size. + +Arguments: +"""""""""" + +The first three arguments are the same as they are in the +:ref:`@llvm.memmove <int_memmove>` intrinsic, with the added constraint that +``len`` is required to be a positive integer multiple of the ``element_size``. +If ``len`` is not a positive integer multiple of ``element_size``, then the +behaviour of the intrinsic is undefined. + +``element_size`` must be a compile-time constant positive power of two no +greater than a target-specific atomic access size limit. + +For each of the input pointers the ``align`` parameter attribute must be +specified. It must be a power of two no less than the ``element_size``. Caller +guarantees that both the source and destination pointers are aligned to that +boundary. + +Semantics: +"""""""""" + +The '``llvm.memmove.element.unordered.atomic.*``' intrinsic copies ``len`` bytes +of memory from the source location to the destination location. These locations +are allowed to overlap. The memory copy is performed as a sequence of load/store +operations where each access is guaranteed to be a multiple of ``element_size`` +bytes wide and aligned at an ``element_size`` boundary. + +The order of the copy is unspecified. The same value may be read from the source +buffer many times, but only one write is issued to the destination buffer per +element. It is well defined to have concurrent reads and writes to both source +and destination provided those reads and writes are unordered atomic when +specified. + +This intrinsic does not provide any additional ordering guarantees over those +provided by a set of unordered loads from the source location and stores to the +destination. + +Lowering: +""""""""" + +In the most general case call to the +'``llvm.memmove.element.unordered.atomic.*``' is lowered to a call to the symbol +``__llvm_memmove_element_unordered_atomic_*``. Where '*' is replaced with an +actual element size. + The optimizer is allowed to inline the memory copy when it's profitable to do so. + +.. _int_memset_element_unordered_atomic: + +'``llvm.memset.element.unordered.atomic``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +This is an overloaded intrinsic. You can use ``llvm.memset.element.unordered.atomic`` on +any integer bit width and for different address spaces. Not all targets +support all bit widths however. + +:: + + declare void @llvm.memset.element.unordered.atomic.p0i8.i32(i8* <dest>, + i8 <value>, + i32 <len>, + i32 <element_size>) + declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* <dest>, + i8 <value>, + i64 <len>, + i32 <element_size>) + +Overview: +""""""""" + +The '``llvm.memset.element.unordered.atomic.*``' intrinsic is a specialization of the +'``llvm.memset.*``' intrinsic. It differs in that the ``dest`` is treated as an array +with elements that are exactly ``element_size`` bytes, and the assignment to that array +uses uses a sequence of :ref:`unordered atomic <ordering>` store operations +that are a positive integer multiple of the ``element_size`` in size. + +Arguments: +"""""""""" + +The first three arguments are the same as they are in the :ref:`@llvm.memset <int_memset>` +intrinsic, with the added constraint that ``len`` is required to be a positive integer +multiple of the ``element_size``. If ``len`` is not a positive integer multiple of +``element_size``, then the behaviour of the intrinsic is undefined. + +``element_size`` must be a compile-time constant positive power of two no greater than +target-specific atomic access size limit. + +The ``dest`` input pointer must have the ``align`` parameter attribute specified. It +must be a power of two no less than the ``element_size``. Caller guarantees that +the destination pointer is aligned to that boundary. + +Semantics: +"""""""""" + +The '``llvm.memset.element.unordered.atomic.*``' intrinsic sets the ``len`` bytes of +memory starting at the destination location to the given ``value``. The memory is +set with a sequence of store operations where each access is guaranteed to be a +multiple of ``element_size`` bytes wide and aligned at an ``element_size`` boundary. + +The order of the assignment is unspecified. Only one write is issued to the +destination buffer per element. It is well defined to have concurrent reads and +writes to the destination provided those reads and writes are unordered atomic +when specified. + +This intrinsic does not provide any additional ordering guarantees over those +provided by a set of unordered stores to the destination. + +Lowering: +""""""""" + +In the most general case call to the '``llvm.memset.element.unordered.atomic.*``' is +lowered to a call to the symbol ``__llvm_memset_element_unordered_atomic_*``. Where '*' +is replaced with an actual element size. + +The optimizer is allowed to inline the memory assignment when it's profitable to do so. + Modified: vendor/llvm/dist/docs/LibFuzzer.rst ============================================================================== --- vendor/llvm/dist/docs/LibFuzzer.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/LibFuzzer.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -587,7 +587,7 @@ The simplest way is to have a statically initialized g Alternatively, you may define an optional init function and it will receive the program arguments that you can read and modify. Do this **only** if you -realy need to access ``argv``/``argc``. +really need to access ``argv``/``argc``. .. code-block:: c++ Modified: vendor/llvm/dist/docs/tutorial/BuildingAJIT1.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/BuildingAJIT1.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/BuildingAJIT1.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -12,7 +12,7 @@ Welcome to Chapter 1 of the "Building an ORC-based JIT tutorial runs through the implementation of a JIT compiler using LLVM's On-Request-Compilation (ORC) APIs. It begins with a simplified version of the KaleidoscopeJIT class used in the -`Implementing a language with LLVM <LangImpl1.html>`_ tutorials and then +`Implementing a language with LLVM <LangImpl01.html>`_ tutorials and then introduces new features like optimization, lazy compilation and remote execution. @@ -41,7 +41,7 @@ The structure of the tutorial is: a remote process with reduced privileges using the JIT Remote APIs. To provide input for our JIT we will use the Kaleidoscope REPL from -`Chapter 7 <LangImpl7.html>`_ of the "Implementing a language in LLVM tutorial", +`Chapter 7 <LangImpl07.html>`_ of the "Implementing a language in LLVM tutorial", with one minor modification: We will remove the FunctionPassManager from the code for that chapter and replace it with optimization support in our JIT class in Chapter #2. @@ -91,8 +91,8 @@ KaleidoscopeJIT In the previous section we described our API, now we examine a simple implementation of it: The KaleidoscopeJIT class [1]_ that was used in the -`Implementing a language with LLVM <LangImpl1.html>`_ tutorials. We will use -the REPL code from `Chapter 7 <LangImpl7.html>`_ of that tutorial to supply the +`Implementing a language with LLVM <LangImpl01.html>`_ tutorials. We will use +the REPL code from `Chapter 7 <LangImpl07.html>`_ of that tutorial to supply the input for our JIT: Each time the user enters an expression the REPL will add a new IR module containing the code for that expression to the JIT. If the expression is a top-level expression like '1+1' or 'sin(x)', the REPL will also Modified: vendor/llvm/dist/docs/tutorial/BuildingAJIT2.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/BuildingAJIT2.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/BuildingAJIT2.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -25,7 +25,7 @@ IRTransformLayer, to add IR optimization support to Ka Optimizing Modules using the IRTransformLayer ============================================= -In `Chapter 4 <LangImpl4.html>`_ of the "Implementing a language with LLVM" +In `Chapter 4 <LangImpl04.html>`_ of the "Implementing a language with LLVM" tutorial series the llvm *FunctionPassManager* is introduced as a means for optimizing LLVM IR. Interested readers may read that chapter for details, but in short: to optimize a Module we create an llvm::FunctionPassManager @@ -148,7 +148,7 @@ At the bottom of our JIT we add a private method to do *optimizeModule*. This function sets up a FunctionPassManager, adds some passes to it, runs it over every function in the module, and then returns the mutated module. The specific optimizations are the same ones used in -`Chapter 4 <LangImpl4.html>`_ of the "Implementing a language with LLVM" +`Chapter 4 <LangImpl04.html>`_ of the "Implementing a language with LLVM" tutorial series. Readers may visit that chapter for a more in-depth discussion of these, and of IR optimization in general. Modified: vendor/llvm/dist/docs/tutorial/LangImpl02.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/LangImpl02.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/LangImpl02.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -10,7 +10,7 @@ Chapter 2 Introduction Welcome to Chapter 2 of the "`Implementing a language with LLVM <index.html>`_" tutorial. This chapter shows you how to use the -lexer, built in `Chapter 1 <LangImpl1.html>`_, to build a full +lexer, built in `Chapter 1 <LangImpl01.html>`_, to build a full `parser <http://en.wikipedia.org/wiki/Parsing>`_ for our Kaleidoscope language. Once we have a parser, we'll define and build an `Abstract Syntax Tree <http://en.wikipedia.org/wiki/Abstract_syntax_tree>`_ (AST). Modified: vendor/llvm/dist/docs/tutorial/LangImpl03.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/LangImpl03.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/LangImpl03.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -10,7 +10,7 @@ Chapter 3 Introduction Welcome to Chapter 3 of the "`Implementing a language with LLVM <index.html>`_" tutorial. This chapter shows you how to transform -the `Abstract Syntax Tree <LangImpl2.html>`_, built in Chapter 2, into +the `Abstract Syntax Tree <LangImpl02.html>`_, built in Chapter 2, into LLVM IR. This will teach you a little bit about how LLVM does things, as well as demonstrate how easy it is to use. It's much more work to build a lexer and parser than it is to generate LLVM IR code. :) @@ -362,7 +362,7 @@ end of the new basic block. Basic blocks in LLVM are a of functions that define the `Control Flow Graph <http://en.wikipedia.org/wiki/Control_flow_graph>`_. Since we don't have any control flow, our functions will only contain one block -at this point. We'll fix this in `Chapter 5 <LangImpl5.html>`_ :). +at this point. We'll fix this in `Chapter 5 <LangImpl05.html>`_ :). Next we add the function arguments to the NamedValues map (after first clearing it out) so that they're accessible to ``VariableExprAST`` nodes. @@ -540,7 +540,7 @@ functions referencing each other. This wraps up the third chapter of the Kaleidoscope tutorial. Up next, we'll describe how to `add JIT codegen and optimizer -support <LangImpl4.html>`_ to this so we can actually start running +support <LangImpl04.html>`_ to this so we can actually start running code! Full Code Listing Modified: vendor/llvm/dist/docs/tutorial/LangImpl04.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/LangImpl04.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/LangImpl04.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -622,7 +622,7 @@ This completes the JIT and optimizer chapter of the Ka tutorial. At this point, we can compile a non-Turing-complete programming language, optimize and JIT compile it in a user-driven way. Next up we'll look into `extending the language with control flow -constructs <LangImpl5.html>`_, tackling some interesting LLVM IR issues +constructs <LangImpl05.html>`_, tackling some interesting LLVM IR issues along the way. Full Code Listing Modified: vendor/llvm/dist/docs/tutorial/LangImpl05.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/LangImpl05.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/LangImpl05.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -269,7 +269,7 @@ Phi nodes: #. Values that are implicit in the structure of your AST, such as the Phi node in this case. -In `Chapter 7 <LangImpl7.html>`_ of this tutorial ("mutable variables"), +In `Chapter 7 <LangImpl07.html>`_ of this tutorial ("mutable variables"), we'll talk about #1 in depth. For now, just believe me that you don't need SSA construction to handle this case. For #2, you have the choice of using the techniques that we will describe for #1, or you can insert @@ -790,7 +790,7 @@ of the tutorial. In this chapter we added two control and used them to motivate a couple of aspects of the LLVM IR that are important for front-end implementors to know. In the next chapter of our saga, we will get a bit crazier and add `user-defined -operators <LangImpl6.html>`_ to our poor innocent language. +operators <LangImpl06.html>`_ to our poor innocent language. Full Code Listing ================= Modified: vendor/llvm/dist/docs/tutorial/LangImpl06.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/LangImpl06.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/LangImpl06.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -41,7 +41,7 @@ The point of going into user-defined operators in a tu is to show the power and flexibility of using a hand-written parser. Thus far, the parser we have been implementing uses recursive descent for most parts of the grammar and operator precedence parsing for the -expressions. See `Chapter 2 <LangImpl2.html>`_ for details. By +expressions. See `Chapter 2 <LangImpl02.html>`_ for details. By using operator precedence parsing, it is very easy to allow the programmer to introduce new operators into the grammar: the grammar is dynamically extensible as the JIT runs. @@ -734,7 +734,7 @@ side-effects, but it can't actually define and mutate Strikingly, variable mutation is an important feature of some languages, and it is not at all obvious how to `add support for mutable -variables <LangImpl7.html>`_ without having to add an "SSA construction" +variables <LangImpl07.html>`_ without having to add an "SSA construction" phase to your front-end. In the next chapter, we will describe how you can add variable mutation without building SSA in your front-end. Modified: vendor/llvm/dist/docs/tutorial/OCamlLangImpl5.rst ============================================================================== --- vendor/llvm/dist/docs/tutorial/OCamlLangImpl5.rst Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/docs/tutorial/OCamlLangImpl5.rst Thu Jul 13 19:25:18 2017 (r320957) @@ -258,7 +258,7 @@ a truth value as a 1-bit (bool) value. let then_bb = append_block context "then" the_function in position_at_end then_bb builder; -As opposed to the `C++ tutorial <LangImpl5.html>`_, we have to build our +As opposed to the `C++ tutorial <LangImpl05.html>`_, we have to build our basic blocks bottom up since we can't have dangling BasicBlocks. We start off by saving a pointer to the first block (which might not be the entry block), which we'll need to build a conditional branch later. We Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/KaleidoscopeJIT.h ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/KaleidoscopeJIT.h Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/KaleidoscopeJIT.h Thu Jul 13 19:25:18 2017 (r320957) @@ -48,6 +48,7 @@ class KaleidoscopeJIT { (public) KaleidoscopeJIT() : TM(EngineBuilder().selectTarget()), DL(TM->createDataLayout()), + ObjectLayer([]() { return std::make_shared<SectionMemoryManager>(); }), CompileLayer(ObjectLayer, SimpleCompiler(*TM)) { llvm::sys::DynamicLibrary::LoadLibraryPermanently(nullptr); } @@ -74,9 +75,8 @@ class KaleidoscopeJIT { (public) // Add the set to the JIT with the resolver we created above and a newly // created SectionMemoryManager. - return CompileLayer.addModule(std::move(M), - make_unique<SectionMemoryManager>(), - std::move(Resolver)); + return cantFail(CompileLayer.addModule(std::move(M), + std::move(Resolver))); } JITSymbol findSymbol(const std::string Name) { @@ -87,7 +87,7 @@ class KaleidoscopeJIT { (public) } void removeModule(ModuleHandle H) { - CompileLayer.removeModule(H); + cantFail(CompileLayer.removeModule(H)); } }; Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp Thu Jul 13 19:25:18 2017 (r320957) @@ -1150,7 +1150,7 @@ static void HandleTopLevelExpression() { // Get the symbol's address and cast it to the right type (takes no // arguments, returns a double) so we can call it as a native function. - double (*FP)() = (double (*)())(intptr_t)ExprSymbol.getAddress(); + double (*FP)() = (double (*)())(intptr_t)cantFail(ExprSymbol.getAddress()); fprintf(stderr, "Evaluated to %f\n", FP()); // Delete the anonymous expression module from the JIT. Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/KaleidoscopeJIT.h ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/KaleidoscopeJIT.h Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/KaleidoscopeJIT.h Thu Jul 13 19:25:18 2017 (r320957) @@ -57,6 +57,7 @@ class KaleidoscopeJIT { (public) KaleidoscopeJIT() : TM(EngineBuilder().selectTarget()), DL(TM->createDataLayout()), + ObjectLayer([]() { return std::make_shared<SectionMemoryManager>(); }), CompileLayer(ObjectLayer, SimpleCompiler(*TM)), OptimizeLayer(CompileLayer, [this](std::shared_ptr<Module> M) { @@ -87,9 +88,8 @@ class KaleidoscopeJIT { (public) // Add the set to the JIT with the resolver we created above and a newly // created SectionMemoryManager. - return OptimizeLayer.addModule(std::move(M), - make_unique<SectionMemoryManager>(), - std::move(Resolver)); + return cantFail(OptimizeLayer.addModule(std::move(M), + std::move(Resolver))); } JITSymbol findSymbol(const std::string Name) { @@ -100,7 +100,7 @@ class KaleidoscopeJIT { (public) } void removeModule(ModuleHandle H) { - OptimizeLayer.removeModule(H); + cantFail(OptimizeLayer.removeModule(H)); } private: Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp Thu Jul 13 19:25:18 2017 (r320957) @@ -1150,7 +1150,7 @@ static void HandleTopLevelExpression() { // Get the symbol's address and cast it to the right type (takes no // arguments, returns a double) so we can call it as a native function. - double (*FP)() = (double (*)())(intptr_t)ExprSymbol.getAddress(); + double (*FP)() = (double (*)())(intptr_t)cantFail(ExprSymbol.getAddress()); fprintf(stderr, "Evaluated to %f\n", FP()); // Delete the anonymous expression module from the JIT. Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h Thu Jul 13 19:25:18 2017 (r320957) @@ -63,6 +63,7 @@ class KaleidoscopeJIT { (public) KaleidoscopeJIT() : TM(EngineBuilder().selectTarget()), DL(TM->createDataLayout()), + ObjectLayer([]() { return std::make_shared<SectionMemoryManager>(); }), CompileLayer(ObjectLayer, SimpleCompiler(*TM)), OptimizeLayer(CompileLayer, [this](std::shared_ptr<Module> M) { @@ -100,9 +101,7 @@ class KaleidoscopeJIT { (public) // Add the set to the JIT with the resolver we created above and a newly // created SectionMemoryManager. - return CODLayer.addModule(std::move(M), - make_unique<SectionMemoryManager>(), - std::move(Resolver)); + return cantFail(CODLayer.addModule(std::move(M), std::move(Resolver))); } JITSymbol findSymbol(const std::string Name) { @@ -113,7 +112,7 @@ class KaleidoscopeJIT { (public) } void removeModule(ModuleHandle H) { - CODLayer.removeModule(H); + cantFail(CODLayer.removeModule(H)); } private: Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp Thu Jul 13 19:25:18 2017 (r320957) @@ -1150,7 +1150,7 @@ static void HandleTopLevelExpression() { // Get the symbol's address and cast it to the right type (takes no // arguments, returns a double) so we can call it as a native function. - double (*FP)() = (double (*)())(intptr_t)ExprSymbol.getAddress(); + double (*FP)() = (double (*)())(intptr_t)cantFail(ExprSymbol.getAddress()); fprintf(stderr, "Evaluated to %f\n", FP()); // Delete the anonymous expression module from the JIT. Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h Thu Jul 13 19:25:18 2017 (r320957) @@ -90,6 +90,7 @@ class KaleidoscopeJIT { (public) KaleidoscopeJIT() : TM(EngineBuilder().selectTarget()), DL(TM->createDataLayout()), + ObjectLayer([]() { return std::make_shared<SectionMemoryManager>(); }), CompileLayer(ObjectLayer, SimpleCompiler(*TM)), OptimizeLayer(CompileLayer, [this](std::shared_ptr<Module> M) { @@ -127,9 +128,8 @@ class KaleidoscopeJIT { (public) // Add the set to the JIT with the resolver we created above and a newly // created SectionMemoryManager. - return OptimizeLayer.addModule(std::move(M), - make_unique<SectionMemoryManager>(), - std::move(Resolver)); + return cantFail(OptimizeLayer.addModule(std::move(M), + std::move(Resolver))); } Error addFunctionAST(std::unique_ptr<FunctionAST> FnAST) { @@ -175,7 +175,7 @@ class KaleidoscopeJIT { (public) addModule(std::move(M)); auto Sym = findSymbol(SharedFnAST->getName() + "$impl"); assert(Sym && "Couldn't find compiled function?"); - JITTargetAddress SymAddr = Sym.getAddress(); + JITTargetAddress SymAddr = cantFail(Sym.getAddress()); if (auto Err = IndirectStubsMgr->updatePointer(mangle(SharedFnAST->getName()), SymAddr)) { @@ -195,7 +195,7 @@ class KaleidoscopeJIT { (public) } void removeModule(ModuleHandle H) { - OptimizeLayer.removeModule(H); + cantFail(OptimizeLayer.removeModule(H)); } private: Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp Thu Jul 13 19:25:18 2017 (r320957) @@ -1153,7 +1153,7 @@ static void HandleTopLevelExpression() { // Get the symbol's address and cast it to the right type (takes no // arguments, returns a double) so we can call it as a native function. - double (*FP)() = (double (*)())(intptr_t)ExprSymbol.getAddress(); + double (*FP)() = (double (*)())(intptr_t)cantFail(ExprSymbol.getAddress()); fprintf(stderr, "Evaluated to %f\n", FP()); // Delete the anonymous expression module from the JIT. Modified: vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter5/KaleidoscopeJIT.h ============================================================================== --- vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter5/KaleidoscopeJIT.h Thu Jul 13 18:27:22 2017 (r320956) +++ vendor/llvm/dist/examples/Kaleidoscope/BuildingAJIT/Chapter5/KaleidoscopeJIT.h Thu Jul 13 19:25:18 2017 (r320957) @@ -97,6 +97,15 @@ class KaleidoscopeJIT { (public) : TM(EngineBuilder().selectTarget(Triple(Remote.getTargetTriple()), "", "", SmallVector<std::string, 0>())), DL(TM->createDataLayout()), + ObjectLayer([&Remote]() { + std::unique_ptr<MyRemote::RCMemoryManager> MemMgr; + if (auto Err = Remote.createRemoteMemoryManager(MemMgr)) { + logAllUnhandledErrors(std::move(Err), errs(), + "Error creating remote memory manager:"); + exit(1); + } + return MemMgr; + }), CompileLayer(ObjectLayer, SimpleCompiler(*TM)), OptimizeLayer(CompileLayer, [this](std::shared_ptr<Module> M) { @@ -146,18 +155,10 @@ class KaleidoscopeJIT { (public) return JITSymbol(nullptr); }); - std::unique_ptr<MyRemote::RCMemoryManager> MemMgr; - if (auto Err = Remote.createRemoteMemoryManager(MemMgr)) { - logAllUnhandledErrors(std::move(Err), errs(), - "Error creating remote memory manager:"); - exit(1); - } - // Add the set to the JIT with the resolver we created above and a newly // created SectionMemoryManager. - return OptimizeLayer.addModule(std::move(M), - std::move(MemMgr), - std::move(Resolver)); + return cantFail(OptimizeLayer.addModule(std::move(M), + std::move(Resolver))); *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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