Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 28 Oct 2017 16:50:24 +0000 (UTC)
From:      Ian Lepore <ian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r325054 - head/sys/dev/ffec
Message-ID:  <201710281650.v9SGoOcY052522@repo.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: ian
Date: Sat Oct 28 16:50:23 2017
New Revision: 325054
URL: https://svnweb.freebsd.org/changeset/base/325054

Log:
  Increase the alignment of the rx/tx descriptor ring buffers to 64 bytes.
  
  16 was the correct alignment for older hardware, but the imx7 requires
  64-byte alignment, which is a fine value to use on all systems.
  
  PR:		222634
  Submitted by:	sebastian.huber@embedded-brains.de

Modified:
  head/sys/dev/ffec/if_ffecreg.h

Modified: head/sys/dev/ffec/if_ffecreg.h
==============================================================================
--- head/sys/dev/ffec/if_ffecreg.h	Sat Oct 28 07:06:57 2017	(r325053)
+++ head/sys/dev/ffec/if_ffecreg.h	Sat Oct 28 16:50:23 2017	(r325054)
@@ -317,7 +317,7 @@ struct ffec_hwdesc
  * The hardware imposes alignment restrictions on various objects involved in
  * DMA transfers.  These values are expressed in bytes (not bits).
  */
-#define	FEC_DESC_RING_ALIGN		16
+#define	FEC_DESC_RING_ALIGN		64
 #define	FEC_RXBUF_ALIGN			16
 #define	FEC_TXBUF_ALIGN			16
 



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201710281650.v9SGoOcY052522>