Date: Thu, 3 May 2018 15:40:56 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r333213 - stable/11/sys/dev/e1000 Message-ID: <201805031540.w43Feu9x043832@repo.freebsd.org>
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Author: marius Date: Thu May 3 15:40:56 2018 New Revision: 333213 URL: https://svnweb.freebsd.org/changeset/base/333213 Log: MFC: r327312, r327842, r327865 - Add initial support for Intel Ice Lake and Cannon Lake Ethernet MACs. - Add workaround for Intel Sky Lake and Kabby Lake Ethernet MAC erratum 1.5.4.5. - Fix uses of 1 << 31. Modified: stable/11/sys/dev/e1000/e1000_82575.h stable/11/sys/dev/e1000/e1000_api.c stable/11/sys/dev/e1000/e1000_hw.h stable/11/sys/dev/e1000/e1000_ich8lan.c stable/11/sys/dev/e1000/e1000_ich8lan.h stable/11/sys/dev/e1000/e1000_regs.h stable/11/sys/dev/e1000/if_em.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/e1000/e1000_82575.h ============================================================================== --- stable/11/sys/dev/e1000/e1000_82575.h Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_82575.h Thu May 3 15:40:56 2018 (r333213) @@ -384,7 +384,7 @@ struct e1000_adv_tx_context_desc { #define E1000_ETQF_FILTER_ENABLE (1 << 26) #define E1000_ETQF_IMM_INT (1 << 29) #define E1000_ETQF_1588 (1 << 30) -#define E1000_ETQF_QUEUE_ENABLE (1 << 31) +#define E1000_ETQF_QUEUE_ENABLE (1U << 31) /* * ETQF filter list: one static filter per filter consumer. This is * to avoid filter collisions later. Add new filters @@ -411,7 +411,7 @@ struct e1000_adv_tx_context_desc { #define E1000_DTXSWC_LLE_MASK 0x00FF0000 /* Per VF Local LB enables */ #define E1000_DTXSWC_VLAN_SPOOF_SHIFT 8 #define E1000_DTXSWC_LLE_SHIFT 16 -#define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */ +#define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1U << 31) /* global VF LB enable */ /* Easy defines for setting default pool, would normally be left a zero */ #define E1000_VT_CTL_DEFAULT_POOL_SHIFT 7 Modified: stable/11/sys/dev/e1000/e1000_api.c ============================================================================== --- stable/11/sys/dev/e1000/e1000_api.c Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_api.c Thu May 3 15:40:56 2018 (r333213) @@ -310,6 +310,16 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) case E1000_DEV_ID_PCH_SPT_I219_V5: mac->type = e1000_pch_spt; break; + case E1000_DEV_ID_PCH_CNP_I219_LM6: + case E1000_DEV_ID_PCH_CNP_I219_V6: + case E1000_DEV_ID_PCH_CNP_I219_LM7: + case E1000_DEV_ID_PCH_CNP_I219_V7: + case E1000_DEV_ID_PCH_ICP_I219_LM8: + case E1000_DEV_ID_PCH_ICP_I219_V8: + case E1000_DEV_ID_PCH_ICP_I219_LM9: + case E1000_DEV_ID_PCH_ICP_I219_V9: + mac->type = e1000_pch_cnp; + break; case E1000_DEV_ID_82575EB_COPPER: case E1000_DEV_ID_82575EB_FIBER_SERDES: case E1000_DEV_ID_82575GB_QUAD_COPPER: @@ -461,6 +471,7 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool i case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: e1000_init_function_pointers_ich8lan(hw); break; case e1000_82575: Modified: stable/11/sys/dev/e1000/e1000_hw.h ============================================================================== --- stable/11/sys/dev/e1000/e1000_hw.h Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_hw.h Thu May 3 15:40:56 2018 (r333213) @@ -146,6 +146,14 @@ struct e1000_hw; #define E1000_DEV_ID_PCH_SPT_I219_V4 0x15D8 #define E1000_DEV_ID_PCH_SPT_I219_LM5 0x15E3 #define E1000_DEV_ID_PCH_SPT_I219_V5 0x15D6 +#define E1000_DEV_ID_PCH_CNP_I219_LM6 0x15BD +#define E1000_DEV_ID_PCH_CNP_I219_V6 0x15BE +#define E1000_DEV_ID_PCH_CNP_I219_LM7 0x15BB +#define E1000_DEV_ID_PCH_CNP_I219_V7 0x15BC +#define E1000_DEV_ID_PCH_ICP_I219_LM8 0x15DF +#define E1000_DEV_ID_PCH_ICP_I219_V8 0x15E0 +#define E1000_DEV_ID_PCH_ICP_I219_LM9 0x15E1 +#define E1000_DEV_ID_PCH_ICP_I219_V9 0x15E2 #define E1000_DEV_ID_82576 0x10C9 #define E1000_DEV_ID_82576_FIBER 0x10E6 #define E1000_DEV_ID_82576_SERDES 0x10E7 @@ -232,6 +240,7 @@ enum e1000_mac_type { e1000_pch2lan, e1000_pch_lpt, e1000_pch_spt, + e1000_pch_cnp, e1000_82575, e1000_82576, e1000_82580, Modified: stable/11/sys/dev/e1000/e1000_ich8lan.c ============================================================================== --- stable/11/sys/dev/e1000/e1000_ich8lan.c Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_ich8lan.c Thu May 3 15:40:56 2018 (r333213) @@ -344,6 +344,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1 switch (hw->mac.type) { case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: if (e1000_phy_is_accessible_pchlan(hw)) break; @@ -492,6 +493,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_h case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: /* In case the PHY needs to be in mdio slow mode, * set slow mode and try to get the PHY id again. */ @@ -793,6 +795,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_ /* fall-through */ case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: /* multicast address update for pch2 */ mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_pch2lan; @@ -1830,6 +1833,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000 case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: hw->phy.ops.init_params = e1000_init_phy_params_pchlan; break; default: @@ -2294,6 +2298,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; break; default: @@ -2654,6 +2659,8 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e10 e1000_phy_sw_reset_generic(hw); ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, 0x3140); + if (ret_val) + return ret_val; } } @@ -3411,6 +3418,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct switch (hw->mac.type) { case e1000_pch_spt: + case e1000_pch_cnp: bank1_offset = nvm->flash_bank_size; act_offset = E1000_ICH_NVM_SIG_WORD; @@ -4386,6 +4394,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct switch (hw->mac.type) { case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: word = NVM_COMPAT; valid_csum_mask = NVM_COMPAT_VALID_CSUM; break; @@ -5192,7 +5201,7 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1 /* Device Status */ if (hw->mac.type == e1000_ich8lan) { reg = E1000_READ_REG(hw, E1000_STATUS); - reg &= ~(1 << 31); + reg &= ~(1U << 31); E1000_WRITE_REG(hw, E1000_STATUS, reg); } Modified: stable/11/sys/dev/e1000/e1000_ich8lan.h ============================================================================== --- stable/11/sys/dev/e1000/e1000_ich8lan.h Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_ich8lan.h Thu May 3 15:40:56 2018 (r333213) @@ -123,7 +123,8 @@ #define NVM_SIZE_MULTIPLIER 4096 /*multiplier for NVMS field*/ #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/ #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ -#define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) +#define E1000_TARC0_CB_MULTIQ_3_REQ 0x30000000 +#define E1000_TARC0_CB_MULTIQ_2_REQ 0x20000000 #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL #define E1000_ICH_RAR_ENTRIES 7 Modified: stable/11/sys/dev/e1000/e1000_regs.h ============================================================================== --- stable/11/sys/dev/e1000/e1000_regs.h Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/e1000_regs.h Thu May 3 15:40:56 2018 (r333213) @@ -214,7 +214,7 @@ /* QAV Tx mode control register bitfields masks */ #define E1000_TQAVCC_IDLE_SLOPE 0xFFFF /* Idle slope */ #define E1000_TQAVCC_KEEP_CREDITS (1 << 30) /* Keep credits opt enable */ -#define E1000_TQAVCC_QUEUE_MODE (1 << 31) /* SP vs. SR Tx mode */ +#define E1000_TQAVCC_QUEUE_MODE (1U << 31) /* SP vs. SR Tx mode */ /* Good transmitted packets counter registers */ #define E1000_PQGPTC(_n) (0x010014 + (0x100 * (_n))) Modified: stable/11/sys/dev/e1000/if_em.c ============================================================================== --- stable/11/sys/dev/e1000/if_em.c Thu May 3 15:33:18 2018 (r333212) +++ stable/11/sys/dev/e1000/if_em.c Thu May 3 15:40:56 2018 (r333213) @@ -205,6 +205,18 @@ static em_vendor_info_t em_vendor_info_array[] = { 0x8086, E1000_DEV_ID_PCH_SPT_I219_LM5, PCI_ANY_ID, PCI_ANY_ID, 0}, { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V5, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_CNP_I219_LM6, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_CNP_I219_V6, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_CNP_I219_LM7, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_CNP_I219_V7, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_ICP_I219_LM8, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_ICP_I219_V8, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_ICP_I219_LM9, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_ICP_I219_V9, PCI_ANY_ID, PCI_ANY_ID, 0}, /* required last entry */ { 0, 0, 0, 0, 0} }; @@ -593,7 +605,7 @@ em_attach(device_t dev) ** so use the same tag and an offset handle for the ** FLASH read/write macros in the shared code. */ - else if (hw->mac.type == e1000_pch_spt) { + else if (hw->mac.type >= e1000_pch_spt) { adapter->osdep.flash_bus_space_tag = adapter->osdep.mem_bus_space_tag; adapter->osdep.flash_bus_space_handle = @@ -1196,6 +1208,7 @@ em_ioctl(if_t ifp, u_long command, caddr_t data) case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: case e1000_82574: case e1000_82583: case e1000_80003es2lan: /* 9K Jumbo Frame size */ @@ -3079,6 +3092,7 @@ em_reset(struct adapter *adapter) case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: pba = E1000_PBA_26K; break; default: @@ -3138,6 +3152,7 @@ em_reset(struct adapter *adapter) case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: hw->fc.high_water = 0x5C20; hw->fc.low_water = 0x5048; hw->fc.pause_time = 0x0650; @@ -3779,13 +3794,16 @@ em_initialize_transmit_unit(struct adapter *adapter) /* This write will effectively turn on the transmit unit. */ E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); + /* SPT and KBL errata workarounds */ if (hw->mac.type == e1000_pch_spt) { u32 reg; reg = E1000_READ_REG(hw, E1000_IOSFPC); reg |= E1000_RCTL_RDMTS_HEX; E1000_WRITE_REG(hw, E1000_IOSFPC, reg); + /* i218-i219 Specification Update 1.5.4.5 */ reg = E1000_READ_REG(hw, E1000_TARC(0)); - reg |= E1000_TARC0_CB_MULTIQ_3_REQ; + reg &= ~E1000_TARC0_CB_MULTIQ_3_REQ; + reg |= E1000_TARC0_CB_MULTIQ_2_REQ; E1000_WRITE_REG(hw, E1000_TARC(0), reg); } } @@ -5297,6 +5315,7 @@ em_get_wakeup(device_t dev) case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: + case e1000_pch_cnp: apme_mask = E1000_WUC_APME; adapter->has_amt = TRUE; eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
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