Date: Mon, 17 Mar 2014 09:29:12 +0100 From: Wojciech Macek <wma@semihalf.com> To: freebsd-arm@freebsd.org Subject: Re: arm SMP on Cortex-A15 Message-ID: <CANsEV8fWvUkFHi8DP6Nr807RwPDB1iZrO39fpfa44qOkJPidZA@mail.gmail.com> In-Reply-To: <20131222123636.GA61193@ci0.org> References: <CANsEV8euHTsfviiCMP_aet3qYiK2T-oK%2B-37eay7zAPH2S2vaA@mail.gmail.com> <20131220125638.GA5132@mail.bsdpad.com> <20131222092913.GA89153@mail.bsdpad.com> <CANsEV8fSoygoSUyQqKoEQ7tRxjqDOwrPD8dU7O2V2PXRj35j4A@mail.gmail.com> <20131222123636.GA61193@ci0.org>
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Hi, Finally I've found some time to continue SMP hacking. It seems that I isolated the tlb/pmam failures and developed two simple patches that help. There are still some pmap changes and TEX remap left, but I don't want to use them now. https://drive.google.com/folderview?id=0B-7yTLrPxaWtSzZPUGgtM3pnUjg&usp=sharing * 01 - ensure that TTB is set before TLB invalidation and flush BTB to comply the specs * 02 - add missing TLB invalidations to pmap and fix invalidation order I chose buildworld -j4 as a stresstest, and run it on Arndale (USB rootfs) and a different 4-core a15 chip (SATA rootfs). On both setups test passed and was significantly faster than the one with previous patchset. I'd like to submit these changes to FreeBSD tree (with some help from our local committers), so any comments and testing are really appreciated. Best regards, Wojtek 2013-12-22 13:36 GMT+01:00 Olivier Houchard <mlfbsd@ci0.org>: > On Sun, Dec 22, 2013 at 11:53:47AM +0100, Wojciech Macek wrote: > > Thanks, so it seems that there is still something wrong... > > From what I observed, the place where you got the panic was the most > likely > > to fail if there are issues with TLB cache. I guess your case can also > have > > the same root case. Nevertheless, I'll try to reproduce your setup and > > debug it futher. > > > > Regards, > > Wojtek > > I'm quite sure Ruslan's panic happens because the VFP code isn't completely > smp-safe, and I have patches that hopefully fixes this. > > Regards, > > Olivier > > >
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