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Date:      Mon, 22 Mar 1999 12:07:02 -0500
From:      Dennis <dennis@etinc.com>
To:        Mike Smith <mike@smith.net.au>
Cc:        Amancio Hasty <hasty@rah.star-gate.com>, hackers@freebsd.org
Subject:   Re: Gigabit ethernet -- what am I doing wrong? 
Message-ID:  <199903221711.MAA20551@etinc.com>
In-Reply-To: <199903220200.SAA02330@dingo.cdrom.com>
References:  <Your message of "Sun, 21 Mar 1999 20:10:21 EST."             <199903220058.TAA17538@etinc.com>

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At 06:00 PM 3/21/99 -0800, Mike Smith wrote:
>> At 12:13 PM 3/21/99 -0800, you wrote:
>> >
>> >Hmm....
>> >Does anyone know when the faster PCI busses (64bits or 66MHz PCI clock
rate) 
>> >are going to be availabe ?
>> 
>> The "availability" of 66Mhz busses is almost moot. Making ASICs work at
33mhz
>> is a chore....66mhz is a waze off. 
>
>That's close, but several of the major ASIC vendors were (or were
>claiming to be) sampling devices with 66MHz PCI macrocells the last time
>I looked.

Any names? the vendors will be few, I think, for awhile.

>> And as far a 64 bit busses.....there
>> arent many
>> processors that can do is, and doubling the bandwidth on a 32bit processor
>> isnt
>> always linear in performance. You have to get a whole new generation of 
>> processors before you will see any usable products.
>
>This has nothing whatever to do with reality, however.  Most PCI 
>peripherals are bus masters, and most memory busses these days are at 
>least 64 bits wide, so 64 bit PCI has very real performance benefits.
>
>The processor's internal word size has little or nothing to do with the 
>equation.

The ability to do single-cycle transfers IS affected by the internal
processor's
word size. If it can't do sustained single-cycle bursts then performance
suffers
significantly, so I disagree wholeheartedly on this. If the on-board processor
doesnt  have a 64bit bus it is very difficult to do single cycle transfers.

Dennis


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