Date: Tue, 06 Sep 2011 17:09:34 -0500 From: Mark Tinguely <marktinguely@gmail.com> To: Ian Lepore <freebsd@damnhippie.dyndns.org> Cc: freebsd-arm <freebsd-arm@freebsd.org> Subject: Re: arm/160431: [patch] Disable interrupts during busdma cache sync operations. Message-ID: <4E669A1E.6060307@gmail.com> In-Reply-To: <1315342967.1671.21.camel@revolution.hippie.lan> References: <201109031940.p83Je9fo004190@freefall.freebsd.org> <1315342967.1671.21.camel@revolution.hippie.lan>
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On 9/6/2011 4:02 PM, Ian Lepore wrote: > After thinking more about Mark's question I've come to the conclusion > that interrupts should only be disabled in the partial cachline flush > case. Basically it comes down to the fact that only that case is > special, in that we temporarily duplicate the state of the hardware into > a local buffer then restore it, and we can't let the state of the real > hardware change during that time. > > It also occurs to me that if it's necessary to disable interrupts during > all cache operations done by the busdma code, then it should be just as > necessary during the operations done by the pmap code, and it's not > clear to me that those operations are all currently happening only while > interrupts are disabled. > > So, here is a do-over on the patch that only disables interrupts in the > partial cacheline case. Considering that the partial case seems to be > pretty rare, and tends to involve buffers smaller a single cacheline, > this should result in having interrupts disabled a whole lot less often > during buffer syncs. > Rant on. I am not picking on you. I hate the BUS_DMASYNC_POSTREAD code! I want it gone, gone,gone. If the page(s) is shared with another memory space, then we know the page caching will be turned off and this is not needed (and if executed anyway, it is sloooow). BUS_DMASYNC_PREREAD would be enough IF: bus_dmamem_alloc() returns cache aligned space (very easy). Force the device driver writers to cache align their buffers. We could provide a define to make it easy. Rant off. --Mark Tinguely
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