Date: Fri, 6 Mar 2020 17:11:29 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r358712 - in projects/clang1000-import: contrib/elftoolchain/libelf contrib/elftoolchain/readelf lib/libc/powerpc64/string libexec/tftpd/tests sbin/mount_nfs sys/amd64/conf sys/arm64/in... Message-ID: <202003061711.026HBTpD010760@repo.freebsd.org>
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Author: dim Date: Fri Mar 6 17:11:29 2020 New Revision: 358712 URL: https://svnweb.freebsd.org/changeset/base/358712 Log: Merge ^/head r358678 through r358711. Added: projects/clang1000-import/sys/dev/aacraid/aacraid_endian.c - copied unchanged from r358711, head/sys/dev/aacraid/aacraid_endian.c projects/clang1000-import/sys/dev/aacraid/aacraid_endian.h - copied unchanged from r358711, head/sys/dev/aacraid/aacraid_endian.h Modified: projects/clang1000-import/contrib/elftoolchain/libelf/libelf_convert.m4 projects/clang1000-import/contrib/elftoolchain/readelf/readelf.c projects/clang1000-import/lib/libc/powerpc64/string/bcopy_resolver.c projects/clang1000-import/lib/libc/powerpc64/string/memcpy.S projects/clang1000-import/lib/libc/powerpc64/string/memcpy_vsx.S projects/clang1000-import/libexec/tftpd/tests/Makefile projects/clang1000-import/sbin/mount_nfs/mount_nfs.c projects/clang1000-import/sys/amd64/conf/NOTES projects/clang1000-import/sys/arm64/include/armreg.h projects/clang1000-import/sys/arm64/include/hypervisor.h projects/clang1000-import/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c projects/clang1000-import/sys/conf/NOTES projects/clang1000-import/sys/conf/files.powerpc projects/clang1000-import/sys/dev/aacraid/aacraid.c projects/clang1000-import/sys/dev/aacraid/aacraid_cam.c projects/clang1000-import/sys/dev/ixl/if_ixl.c projects/clang1000-import/sys/dev/ixl/ixl_pf_main.c projects/clang1000-import/sys/dev/mfi/mfi_tbolt.c projects/clang1000-import/sys/dev/rt/if_rt.c projects/clang1000-import/sys/modules/Makefile projects/clang1000-import/sys/modules/aacraid/Makefile projects/clang1000-import/sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_main.c projects/clang1000-import/sys/powerpc/conf/GENERIC64 projects/clang1000-import/sys/sys/kernel.h Directory Properties: projects/clang1000-import/ (props changed) projects/clang1000-import/contrib/elftoolchain/ (props changed) projects/clang1000-import/sys/cddl/contrib/opensolaris/ (props changed) Modified: projects/clang1000-import/contrib/elftoolchain/libelf/libelf_convert.m4 ============================================================================== --- projects/clang1000-import/contrib/elftoolchain/libelf/libelf_convert.m4 Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/contrib/elftoolchain/libelf/libelf_convert.m4 Fri Mar 6 17:11:29 2020 (r358712) @@ -1022,7 +1022,7 @@ _libelf_cvt_NOTE_tof(unsigned char *dst, size_t dsz, u count -= sizeof(Elf_Note); if (count < sz) - sz = count; + return (0); (void) memcpy(dst, src, sz); Modified: projects/clang1000-import/contrib/elftoolchain/readelf/readelf.c ============================================================================== --- projects/clang1000-import/contrib/elftoolchain/readelf/readelf.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/contrib/elftoolchain/readelf/readelf.c Fri Mar 6 17:11:29 2020 (r358712) @@ -1283,6 +1283,7 @@ note_type_xen(unsigned int nt) case 15: return "XEN_ELFNOTE_INIT_P2M"; case 16: return "XEN_ELFNOTE_MOD_START_PFN"; case 17: return "XEN_ELFNOTE_SUPPORTED_FEATURES"; + case 18: return "XEN_ELFNOTE_PHYS32_ENTRY"; default: return (note_type_unknown(nt)); } } @@ -3676,6 +3677,33 @@ static struct flag_desc note_feature_ctl_flags[] = { }; static void +dump_note_string(const char *description, const char *s, size_t len) +{ + size_t i; + int printable = 1; + + if (len == 0 || s[--len] != '\0') { + printable = 0; + } else { + for (i = 0; i < len; i++) { + if (!isprint(s[i])) { + printable = 0; + break; + } + } + } + + if (printable) { + printf(" %s: %s\n", description, s); + } else { + printf(" description data:"); + for (i = 0; i < len; i++) + printf(" %02x", (unsigned char)s[i]); + printf("\n"); + } +} + +static void dump_notes_data(struct readelf *re, const char *name, uint32_t type, const char *buf, size_t sz) { @@ -3713,6 +3741,30 @@ dump_notes_data(struct readelf *re, const char *name, switch (type) { case NT_GNU_PROPERTY_TYPE_0: dump_gnu_property_type_0(re, buf, sz); + return; + } + } else if (strcmp(name, "Xen") == 0) { + switch (type) { + case 5: + dump_note_string("Xen version", buf, sz); + return; + case 6: + dump_note_string("Guest OS", buf, sz); + return; + case 7: + dump_note_string("Guest version", buf, sz); + return; + case 8: + dump_note_string("Loader", buf, sz); + return; + case 9: + dump_note_string("PAE mode", buf, sz); + return; + case 10: + dump_note_string("Features", buf, sz); + return; + case 11: + dump_note_string("BSD symtab", buf, sz); return; } } Modified: projects/clang1000-import/lib/libc/powerpc64/string/bcopy_resolver.c ============================================================================== --- projects/clang1000-import/lib/libc/powerpc64/string/bcopy_resolver.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/lib/libc/powerpc64/string/bcopy_resolver.c Fri Mar 6 17:11:29 2020 (r358712) @@ -66,7 +66,7 @@ DEFINE_UIFUNC(, FN_RET, FN_NAME, FN_PARAMS) * Since POWER ISA 2.07B this is solved transparently * by the hardware */ - if (cpu_features2 & PPC_FEATURE2_ARCH_2_07) + if (cpu_features & PPC_FEATURE_HAS_VSX) return (FN_NAME_VSX); else return (FN_NAME_NOVSX); Modified: projects/clang1000-import/lib/libc/powerpc64/string/memcpy.S ============================================================================== --- projects/clang1000-import/lib/libc/powerpc64/string/memcpy.S Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/lib/libc/powerpc64/string/memcpy.S Fri Mar 6 17:11:29 2020 (r358712) @@ -39,6 +39,11 @@ WEAK_REFERENCE(__memcpy, memcpy); #define BLOCK_BYTES (1 << BLOCK_BITS) #define BLOCK_MASK (BLOCK_BYTES - 1) +/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults. */ +#ifndef ALIGN_MASK +#define ALIGN_MASK 0x7 +#endif + /* * r3: dst * r4: src @@ -48,6 +53,12 @@ ENTRY(FN_NAME) cmpdi %r5, 0 /* len == 0? nothing to do */ beqlr- + /* If src and dst are relatively misaligned, do byte copies. */ + andi. %r8, %r3, ALIGN_MASK + andi. %r7, %r4, ALIGN_MASK + cmpd %r8, %r7 + mr %r7, %r5 + bne .Lcopy_remaining_fix_index_byte mr %r8, %r3 /* save dst */ /* align src */ Modified: projects/clang1000-import/lib/libc/powerpc64/string/memcpy_vsx.S ============================================================================== --- projects/clang1000-import/lib/libc/powerpc64/string/memcpy_vsx.S Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/lib/libc/powerpc64/string/memcpy_vsx.S Fri Mar 6 17:11:29 2020 (r358712) @@ -30,6 +30,7 @@ #define FN_NAME __memcpy_vsx #define BLOCK_BITS 6 +#define ALIGN_MASK 0xf /* * r5: bytes to copy (multiple of BLOCK_BYTES) Modified: projects/clang1000-import/libexec/tftpd/tests/Makefile ============================================================================== --- projects/clang1000-import/libexec/tftpd/tests/Makefile Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/libexec/tftpd/tests/Makefile Fri Mar 6 17:11:29 2020 (r358712) @@ -10,5 +10,6 @@ TEST_METADATA.functional+= timeout=15 LIBADD= util WARNS?= 6 +CSTD= c11 .include <bsd.test.mk> Modified: projects/clang1000-import/sbin/mount_nfs/mount_nfs.c ============================================================================== --- projects/clang1000-import/sbin/mount_nfs/mount_nfs.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sbin/mount_nfs/mount_nfs.c Fri Mar 6 17:11:29 2020 (r358712) @@ -514,7 +514,7 @@ sec_num_to_name(int flavor) static time_t rtm_ifinfo_sleep(time_t sec) { - char buf[2048]; + char buf[2048] __aligned(__alignof(struct if_msghdr)); fd_set rfds; struct timeval tv, start; ssize_t nread; Modified: projects/clang1000-import/sys/amd64/conf/NOTES ============================================================================== --- projects/clang1000-import/sys/amd64/conf/NOTES Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/amd64/conf/NOTES Fri Mar 6 17:11:29 2020 (r358712) @@ -417,10 +417,6 @@ device aac device aacp # SCSI Passthrough interface (optional, CAM required) # -# Adaptec by PMC RAID controllers, Series 6/7/8 and upcoming families -device aacraid # Container interface, CAM required - -# # Highpoint RocketRAID 27xx. device hpt27xx Modified: projects/clang1000-import/sys/arm64/include/armreg.h ============================================================================== --- projects/clang1000-import/sys/arm64/include/armreg.h Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/arm64/include/armreg.h Fri Mar 6 17:11:29 2020 (r358712) @@ -73,6 +73,11 @@ #define CNTHCTL_EL1PCEN (1 << 1) /* Allow EL0/1 physical timer access */ #define CNTHCTL_EL1PCTEN (1 << 0) /*Allow EL0/1 physical counter access*/ +/* CNTP_CTL_EL0 - Counter-timer Physical Timer Control register */ +#define CNTP_CTL_ENABLE (1 << 0) +#define CNTP_CTL_IMASK (1 << 1) +#define CNTP_CTL_ISTATUS (1 << 2) + /* CPACR_EL1 */ #define CPACR_FPEN_MASK (0x3 << 20) #define CPACR_FPEN_TRAP_ALL1 (0x0 << 20) /* Traps from EL0 and EL1 */ @@ -129,22 +134,53 @@ #define DCZID_BS_SIZE(reg) (((reg) & DCZID_BS_MASK) >> DCZID_BS_SHIFT) /* ESR_ELx */ -#define ESR_ELx_ISS_MASK 0x00ffffff +#define ESR_ELx_ISS_MASK 0x01ffffff #define ISS_INSN_FnV (0x01 << 10) #define ISS_INSN_EA (0x01 << 9) #define ISS_INSN_S1PTW (0x01 << 7) #define ISS_INSN_IFSC_MASK (0x1f << 0) -#define ISS_DATA_ISV (0x01 << 24) -#define ISS_DATA_SAS_MASK (0x03 << 22) -#define ISS_DATA_SSE (0x01 << 21) -#define ISS_DATA_SRT_MASK (0x1f << 16) + +#define ISS_MSR_DIR_SHIFT 0 +#define ISS_MSR_DIR (0x01 << ISS_MSR_DIR_SHIFT) +#define ISS_MSR_Rt_SHIFT 5 +#define ISS_MSR_Rt_MASK (0x1f << ISS_MSR_Rt_SHIFT) +#define ISS_MSR_Rt(x) (((x) & ISS_MSR_Rt_MASK) >> ISS_MSR_Rt_SHIFT) +#define ISS_MSR_CRm_SHIFT 1 +#define ISS_MSR_CRm_MASK (0xf << ISS_MSR_CRm_SHIFT) +#define ISS_MSR_CRm(x) (((x) & ISS_MSR_CRm_MASK) >> ISS_MSR_CRm_SHIFT) +#define ISS_MSR_CRn_SHIFT 10 +#define ISS_MSR_CRn_MASK (0xf << ISS_MSR_CRn_SHIFT) +#define ISS_MSR_CRn(x) (((x) & ISS_MSR_CRn_MASK) >> ISS_MSR_CRn_SHIFT) +#define ISS_MSR_OP1_SHIFT 14 +#define ISS_MSR_OP1_MASK (0x7 << ISS_MSR_OP1_SHIFT) +#define ISS_MSR_OP1(x) (((x) & ISS_MSR_OP1_MASK) >> ISS_MSR_OP1_SHIFT) +#define ISS_MSR_OP2_SHIFT 17 +#define ISS_MSR_OP2_MASK (0x7 << ISS_MSR_OP2_SHIFT) +#define ISS_MSR_OP2(x) (((x) & ISS_MSR_OP2_MASK) >> ISS_MSR_OP2_SHIFT) +#define ISS_MSR_OP0_SHIFT 20 +#define ISS_MSR_OP0_MASK (0x3 << ISS_MSR_OP0_SHIFT) +#define ISS_MSR_OP0(x) (((x) & ISS_MSR_OP0_MASK) >> ISS_MSR_OP0_SHIFT) +#define ISS_MSR_REG_MASK \ + (ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | \ + ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK) + + +#define ISS_DATA_ISV_SHIFT 24 +#define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT) +#define ISS_DATA_SAS_SHIFT 22 +#define ISS_DATA_SAS_MASK (0x03 << ISS_DATA_SAS_SHIFT) +#define ISS_DATA_SSE_SHIFT 21 +#define ISS_DATA_SSE (0x01 << ISS_DATA_SSE_SHIFT) +#define ISS_DATA_SRT_SHIFT 16 +#define ISS_DATA_SRT_MASK (0x1f << ISS_DATA_SRT_SHIFT) #define ISS_DATA_SF (0x01 << 15) #define ISS_DATA_AR (0x01 << 14) #define ISS_DATA_FnV (0x01 << 10) #define ISS_DATA_EA (0x01 << 9) #define ISS_DATA_CM (0x01 << 8) #define ISS_DATA_S1PTW (0x01 << 7) -#define ISS_DATA_WnR (0x01 << 6) +#define ISS_DATA_WnR_SHIFT 6 +#define ISS_DATA_WnR (0x01 << ISS_DATA_WnR_SHIFT) #define ISS_DATA_DFSC_MASK (0x3f << 0) #define ISS_DATA_DFSC_ASF_L0 (0x00 << 0) #define ISS_DATA_DFSC_ASF_L1 (0x01 << 0) @@ -177,10 +213,12 @@ #define ESR_ELx_EC_MASK (0x3f << 26) #define ESR_ELx_EXCEPTION(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) #define EXCP_UNKNOWN 0x00 /* Unkwn exception */ +#define EXCP_TRAP_WFI_WFE 0x01 /* Trapped WFI or WFE */ #define EXCP_FP_SIMD 0x07 /* VFP/SIMD trap */ #define EXCP_ILL_STATE 0x0e /* Illegal execution state */ #define EXCP_SVC32 0x11 /* SVC trap for AArch32 */ #define EXCP_SVC64 0x15 /* SVC trap for AArch64 */ +#define EXCP_HVC 0x16 /* HVC trap */ #define EXCP_MSR 0x18 /* MSR/MRS trap */ #define EXCP_INSN_ABORT_L 0x20 /* Instruction abort, from lower EL */ #define EXCP_INSN_ABORT 0x21 /* Instruction abort, from same EL */ @@ -220,10 +258,6 @@ /* ICC_SRE_EL1 */ #define ICC_SRE_EL1_SRE (1U << 0) -/* ICC_SRE_EL2 */ -#define ICC_SRE_EL2_SRE (1U << 0) -#define ICC_SRE_EL2_EN (1U << 3) - /* ID_AA64DFR0_EL1 */ #define ID_AA64DFR0_EL1 MRS_REG(3, 0, 0, 5, 0) #define ID_AA64DFR0_DebugVer_SHIFT 0 @@ -725,6 +759,8 @@ #define TCR_TG1_4K (2 << TCR_TG1_SHIFT) #define TCR_TG1_64K (3 << TCR_TG1_SHIFT) +#define TCR_TG0_MASK 0x000000000000c000 + #define TCR_SH1_SHIFT 28 #define TCR_SH1_IS (0x3UL << TCR_SH1_SHIFT) #define TCR_ORGN1_SHIFT 26 @@ -751,6 +787,7 @@ #define TCR_T1SZ_SHIFT 16 #define TCR_T0SZ_SHIFT 0 +#define TCR_T0SZ_MASK 0x3f #define TCR_T1SZ(x) ((x) << TCR_T1SZ_SHIFT) #define TCR_T0SZ(x) ((x) << TCR_T0SZ_SHIFT) #define TCR_TxSZ(x) (TCR_T1SZ(x) | TCR_T0SZ(x)) Modified: projects/clang1000-import/sys/arm64/include/hypervisor.h ============================================================================== --- projects/clang1000-import/sys/arm64/include/hypervisor.h Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/arm64/include/hypervisor.h Fri Mar 6 17:11:29 2020 (r358712) @@ -34,19 +34,21 @@ * e.g. specific to EL2, or controlling the hypervisor. */ -/* - * Architecture feature trap register - */ +/* CNTHCTL_EL2 - Counter-timer Hypervisor Control register */ +#define CNTHCTL_EVNTI_MASK (0xf << 4) /* Bit to trigger event stream */ +#define CNTHCTL_EVNTDIR (1 << 3) /* Control transition trigger bit */ +#define CNTHCTL_EVNTEN (1 << 2) /* Enable event stream */ +#define CNTHCTL_EL1PCEN (1 << 1) /* Allow EL0/1 physical timer access */ +#define CNTHCTL_EL1PCTEN (1 << 0) /*Allow EL0/1 physical counter access*/ + +/* CPTR_EL2 - Architecture feature trap register */ #define CPTR_RES0 0x7fefc800 #define CPTR_RES1 0x000033ff #define CPTR_TFP 0x00000400 #define CPTR_TTA 0x00100000 #define CPTR_TCPAC 0x80000000 -/* - * Hypervisor Config Register - */ - +/* HCR_EL2 - Hypervisor Config Register */ #define HCR_VM 0x0000000000000001 #define HCR_SWIO 0x0000000000000002 #define HCR_PTW 0x0000000000000004 @@ -58,6 +60,9 @@ #define HCR_VSE 0x0000000000000100 #define HCR_FB 0x0000000000000200 #define HCR_BSU_MASK 0x0000000000000c00 +#define HCR_BSU_IS 0x0000000000000400 +#define HCR_BSU_OS 0x0000000000000800 +#define HCR_BSU_FS 0x0000000000000c00 #define HCR_DC 0x0000000000001000 #define HCR_TWI 0x0000000000002000 #define HCR_TWE 0x0000000000004000 @@ -69,7 +74,7 @@ #define HCR_TIDCP 0x0000000000100000 #define HCR_TACR 0x0000000000200000 #define HCR_TSW 0x0000000000400000 -#define HCR_TPC 0x0000000000800000 +#define HCR_TPCP 0x0000000000800000 #define HCR_TPU 0x0000000001000000 #define HCR_TTLB 0x0000000002000000 #define HCR_TVM 0x0000000004000000 @@ -92,5 +97,89 @@ #define HCR_NV1 0x0000080000000000 #define HCR_AT 0x0000100000000000 -#endif +/* HPFAR_EL2 - Hypervisor IPA Fault Address Register */ +#define HPFAR_EL2_FIPA_SHIFT 4 +#define HPFAR_EL2_FIPA_MASK 0xfffffffff0 +/* ICC_SRE_EL2 */ +#define ICC_SRE_EL2_SRE (1U << 0) +#define ICC_SRE_EL2_EN (1U << 3) + +/* SCTLR_EL2 - System Control Register */ +#define SCTLR_EL2_RES1 0x30c50830 +#define SCTLR_EL2_M_SHIFT 0 +#define SCTLR_EL2_M (0x1 << SCTLR_EL2_M_SHIFT) +#define SCTLR_EL2_A_SHIFT 1 +#define SCTLR_EL2_A (0x1 << SCTLR_EL2_A_SHIFT) +#define SCTLR_EL2_C_SHIFT 2 +#define SCTLR_EL2_C (0x1 << SCTLR_EL2_C_SHIFT) +#define SCTLR_EL2_SA_SHIFT 3 +#define SCTLR_EL2_SA (0x1 << SCTLR_EL2_SA_SHIFT) +#define SCTLR_EL2_I_SHIFT 12 +#define SCTLR_EL2_I (0x1 << SCTLR_EL2_I_SHIFT) +#define SCTLR_EL2_WXN_SHIFT 19 +#define SCTLR_EL2_WXN (0x1 << SCTLR_EL2_WXN_SHIFT) +#define SCTLR_EL2_EE_SHIFT 25 +#define SCTLR_EL2_EE (0x1 << SCTLR_EL2_EE_SHIFT) + +/* TCR_EL2 - Translation Control Register */ +#define TCR_EL2_RES1 ((0x1UL << 31) | (0x1UL << 23)) +#define TCR_EL2_T0SZ_SHIFT 0 +#define TCR_EL2_T0SZ_MASK (0x3f << TCR_EL2_T0SZ_SHIFT) +#define TCR_EL2_T0SZ(x) ((x) << TCR_EL2_T0SZ_SHIFT) +/* Bits 7:6 are reserved */ +#define TCR_EL2_IRGN0_SHIFT 8 +#define TCR_EL2_IRGN0_MASK (0x3 << TCR_EL2_IRGN0_SHIFT) +#define TCR_EL2_ORGN0_SHIFT 10 +#define TCR_EL2_ORGN0_MASK (0x3 << TCR_EL2_ORGN0_SHIFT) +#define TCR_EL2_SH0_SHIFT 12 +#define TCR_EL2_SH0_MASK (0x3 << TCR_EL2_SH0_SHIFT) +#define TCR_EL2_TG0_SHIFT 14 +#define TCR_EL2_TG0_MASK (0x3 << TCR_EL2_TG0_SHIFT) +#define TCR_EL2_PS_SHIFT 16 +#define TCR_EL2_PS_32BITS (0 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_36BITS (1 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_40BITS (2 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_42BITS (3 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_44BITS (4 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_48BITS (5 << TCR_EL2_PS_SHIFT) +#define TCR_EL2_PS_52BITS (6 << TCR_EL2_PS_SHIFT) /* ARMv8.2-LPA */ + +/* VMPDIR_EL2 - Virtualization Multiprocessor ID Register */ +#define VMPIDR_EL2_U 0x0000000040000000 +#define VMPIDR_EL2_MT 0x0000000001000000 +#define VMPIDR_EL2_RES1 0x0000000080000000 + +/* VTCR_EL2 - Virtualization Translation Control Register */ +#define VTCR_EL2_RES1 (0x1 << 31) +#define VTCR_EL2_T0SZ_MASK 0x3f +#define VTCR_EL2_SL0_SHIFT 6 +#define VTCR_EL2_SL0_4K_LVL2 (0x0 << VTCR_EL2_SL0_SHIFT) +#define VTCR_EL2_SL0_4K_LVL1 (0x1 << VTCR_EL2_SL0_SHIFT) +#define VTCR_EL2_SL0_4K_LVL0 (0x2 << VTCR_EL2_SL0_SHIFT) +#define VTCR_EL2_IRGN0_SHIFT 8 +#define VTCR_EL2_IRGN0_WBWA (0x1 << VTCR_EL2_IRGN0_SHIFT) +#define VTCR_EL2_ORGN0_SHIFT 10 +#define VTCR_EL2_ORGN0_WBWA (0x1 << VTCR_EL2_ORGN0_SHIFT) +#define VTCR_EL2_SH0_SHIFT 12 +#define VTCR_EL2_SH0_NS (0x0 << VTCR_EL2_SH0_SHIFT) +#define VTCR_EL2_SH0_OS (0x2 << VTCR_EL2_SH0_SHIFT) +#define VTCR_EL2_SH0_IS (0x3 << VTCR_EL2_SH0_SHIFT) +#define VTCR_EL2_TG0_SHIFT 14 +#define VTCR_EL2_TG0_4K (0x0 << VTCR_EL2_TG0_SHIFT) +#define VTCR_EL2_TG0_64K (0x1 << VTCR_EL2_TG0_SHIFT) +#define VTCR_EL2_TG0_16K (0x2 << VTCR_EL2_TG0_SHIFT) +#define VTCR_EL2_PS_SHIFT 16 +#define VTCR_EL2_PS_32BIT (0x0 << VTCR_EL2_PS_SHIFT) +#define VTCR_EL2_PS_36BIT (0x1 << VTCR_EL2_PS_SHIFT) +#define VTCR_EL2_PS_40BIT (0x2 << VTCR_EL2_PS_SHIFT) +#define VTCR_EL2_PS_42BIT (0x3 << VTCR_EL2_PS_SHIFT) +#define VTCR_EL2_PS_44BIT (0x4 << VTCR_EL2_PS_SHIFT) +#define VTCR_EL2_PS_48BIT (0x5 << VTCR_EL2_PS_SHIFT) + +/* VTTBR_EL2 - Virtualization Translation Table Base Register */ +#define VTTBR_VMID_MASK 0xffff000000000000 +#define VTTBR_VMID_SHIFT 48 +#define VTTBR_HOST 0x0000000000000000 + +#endif /* !_MACHINE_HYPERVISOR_H_ */ Modified: projects/clang1000-import/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c ============================================================================== --- projects/clang1000-import/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c Fri Mar 6 17:11:29 2020 (r358712) @@ -137,12 +137,6 @@ extern int zfs_vdev_async_write_active_min_dirty_perce */ int zfs_scan_strict_mem_lim = B_FALSE; -/* - * Maximum number of parallelly executing I/Os per top-level vdev. - * Tune with care. Very high settings (hundreds) are known to trigger - * some firmware bugs and resets on certain SSDs. - */ -int zfs_top_maxinflight = 32; /* maximum I/Os per top-level */ unsigned int zfs_resilver_delay = 2; /* number of ticks to delay resilver -- 2 is a good number */ unsigned int zfs_scrub_delay = 4; /* number of ticks to delay scrub -- 4 is a good number */ unsigned int zfs_scan_idle = 50; /* idle window in clock ticks */ @@ -186,8 +180,6 @@ boolean_t zfs_no_scrub_io = B_FALSE; /* set to disable boolean_t zfs_no_scrub_prefetch = B_FALSE; /* set to disable scrub prefetch */ SYSCTL_DECL(_vfs_zfs); -SYSCTL_UINT(_vfs_zfs, OID_AUTO, top_maxinflight, CTLFLAG_RWTUN, - &zfs_top_maxinflight, 0, "Maximum I/Os per top-level vdev"); SYSCTL_UINT(_vfs_zfs, OID_AUTO, resilver_delay, CTLFLAG_RWTUN, &zfs_resilver_delay, 0, "Number of ticks to delay resilver"); SYSCTL_UINT(_vfs_zfs, OID_AUTO, scrub_delay, CTLFLAG_RWTUN, @@ -1538,7 +1530,6 @@ dsl_scan_prefetch_thread(void *arg) dsl_scan_t *scn = arg; spa_t *spa = scn->scn_dp->dp_spa; vdev_t *rvd = spa->spa_root_vdev; - uint64_t maxinflight = rvd->vdev_children * zfs_top_maxinflight; scan_prefetch_issue_ctx_t *spic; /* loop until we are told to stop */ Modified: projects/clang1000-import/sys/conf/NOTES ============================================================================== --- projects/clang1000-import/sys/conf/NOTES Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/conf/NOTES Fri Mar 6 17:11:29 2020 (r358712) @@ -1490,6 +1490,8 @@ options TERMINAL_KERN_ATTR=(FG_LIGHTRED|BG_BLACK) # # SCSI host adapters: # +# aacraid: Adaptec by PMC RAID controllers, Series 6/7/8 and upcoming +# families. Container interface, CAM required. # ahc: Adaptec 274x/284x/2910/293x/294x/394x/3950x/3960x/398X/4944/ # 19160x/29160x, aic7770/aic78xx # ahd: Adaptec 29320/39320 Controllers. @@ -1512,6 +1514,7 @@ options TERMINAL_KERN_ATTR=(FG_LIGHTRED|BG_BLACK) # 53C876, 53C885, 53C895, 53C895A, 53C896, 53C897, 53C1510D, # 53C1010-33, 53C1010-66. +device aacraid device ahc device ahd device esp Modified: projects/clang1000-import/sys/conf/files.powerpc ============================================================================== --- projects/clang1000-import/sys/conf/files.powerpc Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/conf/files.powerpc Fri Mar 6 17:11:29 2020 (r358712) @@ -16,6 +16,7 @@ cddl/dev/dtrace/powerpc/dtrace_subr.c optional dtrace cddl/dev/fbt/powerpc/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support crypto/des/des_enc.c optional crypto | ipsec | ipsec_support | netsmb +dev/aacraid/aacraid_endian.c optional aacraid dev/adb/adb_bus.c optional adb dev/adb/adb_kbd.c optional adb dev/adb/adb_mouse.c optional adb Modified: projects/clang1000-import/sys/dev/aacraid/aacraid.c ============================================================================== --- projects/clang1000-import/sys/dev/aacraid/aacraid.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/dev/aacraid/aacraid.c Fri Mar 6 17:11:29 2020 (r358712) @@ -69,6 +69,7 @@ __FBSDID("$FreeBSD$"); #include <sys/aac_ioctl.h> #include <dev/aacraid/aacraid_debug.h> #include <dev/aacraid/aacraid_var.h> +#include <dev/aacraid/aacraid_endian.h> #ifndef FILTER_HANDLED #define FILTER_HANDLED 0x02 @@ -386,7 +387,7 @@ aac_daemon(void *arg) AAC_FIBSTATE_ASYNC | AAC_FIBSTATE_FAST_RESPONSE; fib->Header.Command = SendHostTime; - *(uint32_t *)fib->data = tv.tv_sec; + *(uint32_t *)fib->data = htole32(tv.tv_sec); aacraid_map_command_sg(cm, NULL, 0, 0); aacraid_release_command(cm); @@ -446,6 +447,7 @@ aac_get_container_info(struct aac_softc *sc, struct aa mi->Command = VM_NameServe; mi->MntType = FT_FILESYS; mi->MntCount = cid; + aac_mntinfo_tole(mi); if (sync_fib) { if (aac_sync_fib(sc, ContainerCommand, 0, fib, @@ -476,6 +478,7 @@ aac_get_container_info(struct aac_softc *sc, struct aa } } bcopy(&fib->data[0], mir, sizeof(struct aac_mntinforesp)); + aac_mntinforesp_toh(mir); /* UID */ *uid = cid; @@ -490,10 +493,12 @@ aac_get_container_info(struct aac_softc *sc, struct aa ccfg->Command = VM_ContainerConfig; ccfg->CTCommand.command = CT_CID_TO_32BITS_UID; ccfg->CTCommand.param[0] = cid; + aac_cnt_config_tole(ccfg); if (sync_fib) { rval = aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof(struct aac_cnt_config)); + aac_cnt_config_toh(ccfg); if (rval == 0 && ccfg->Command == ST_OK && ccfg->CTCommand.param[0] == CT_OK && mir->MntTable[0].VolType != CT_PASSTHRU) @@ -512,6 +517,7 @@ aac_get_container_info(struct aac_softc *sc, struct aa AAC_FIBSTATE_FAST_RESPONSE; fib->Header.Command = ContainerCommand; rval = aacraid_wait_command(cm); + aac_cnt_config_toh(ccfg); if (rval == 0 && ccfg->Command == ST_OK && ccfg->CTCommand.param[0] == CT_OK && mir->MntTable[0].VolType != CT_PASSTHRU) @@ -804,8 +810,8 @@ aacraid_shutdown(device_t dev) cc = (struct aac_close_command *)&fib->data[0]; bzero(cc, sizeof(struct aac_close_command)); - cc->Command = VM_CloseAll; - cc->ContainerId = 0xfffffffe; + cc->Command = htole32(VM_CloseAll); + cc->ContainerId = htole32(0xfffffffe); if (aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof(struct aac_close_command))) printf("FAILED.\n"); @@ -905,6 +911,8 @@ aacraid_new_intr_type1(void *arg) cm = sc->aac_sync_cm; aac_unmap_command(cm); cm->cm_flags |= AAC_CMD_COMPLETED; + aac_fib_header_toh(&cm->cm_fib->Header); + /* is there a completion handler? */ if (cm->cm_complete != NULL) { cm->cm_complete(cm); @@ -931,7 +939,8 @@ aacraid_new_intr_type1(void *arg) for (;;) { isFastResponse = isAif = noMoreAif = 0; /* remove toggle bit (31) */ - handle = (sc->aac_common->ac_host_rrq[index] & 0x7fffffff); + handle = (le32toh(sc->aac_common->ac_host_rrq[index]) & + 0x7fffffff); /* check fast response bit (30) */ if (handle & 0x40000000) isFastResponse = 1; @@ -944,6 +953,7 @@ aacraid_new_intr_type1(void *arg) cm = sc->aac_commands + (handle - 1); fib = cm->cm_fib; + aac_fib_header_toh(&fib->Header); sc->aac_rrq_outstanding[vector_no]--; if (isAif) { noMoreAif = (fib->Header.XferState & AAC_FIBSTATE_NOMOREAIF) ? 1:0; @@ -954,7 +964,7 @@ aacraid_new_intr_type1(void *arg) } else { if (isFastResponse) { fib->Header.XferState |= AAC_FIBSTATE_DONEADAP; - *((u_int32_t *)(fib->data)) = ST_OK; + *((u_int32_t *)(fib->data)) = htole32(ST_OK); cm->cm_flags |= AAC_CMD_FASTRESP; } aac_remove_busy(cm); @@ -1342,6 +1352,10 @@ aacraid_map_command_sg(void *arg, bus_dma_segment_t *s raw->flags |= RIO2_SGL_CONFORMANT; } + for (i = 0; i < nseg; i++) + aac_sge_ieee1212_tole(sg + i); + aac_raw_io2_tole(raw); + /* update the FIB size for the s/g count */ fib->Header.Size += nseg * sizeof(struct aac_sge_ieee1212); @@ -1349,33 +1363,37 @@ aacraid_map_command_sg(void *arg, bus_dma_segment_t *s } else if (fib->Header.Command == RawIo) { struct aac_sg_tableraw *sg; sg = (struct aac_sg_tableraw *)cm->cm_sgtable; - sg->SgCount = nseg; + sg->SgCount = htole32(nseg); for (i = 0; i < nseg; i++) { sg->SgEntryRaw[i].SgAddress = segs[i].ds_addr; sg->SgEntryRaw[i].SgByteCount = segs[i].ds_len; sg->SgEntryRaw[i].Next = 0; sg->SgEntryRaw[i].Prev = 0; sg->SgEntryRaw[i].Flags = 0; + aac_sg_entryraw_tole(&sg->SgEntryRaw[i]); } + aac_raw_io_tole((struct aac_raw_io *)&fib->data[0]); /* update the FIB size for the s/g count */ fib->Header.Size += nseg*sizeof(struct aac_sg_entryraw); } else if ((cm->cm_sc->flags & AAC_FLAGS_SG_64BIT) == 0) { struct aac_sg_table *sg; sg = cm->cm_sgtable; - sg->SgCount = nseg; + sg->SgCount = htole32(nseg); for (i = 0; i < nseg; i++) { sg->SgEntry[i].SgAddress = segs[i].ds_addr; sg->SgEntry[i].SgByteCount = segs[i].ds_len; + aac_sg_entry_tole(&sg->SgEntry[i]); } /* update the FIB size for the s/g count */ fib->Header.Size += nseg*sizeof(struct aac_sg_entry); } else { struct aac_sg_table64 *sg; sg = (struct aac_sg_table64 *)cm->cm_sgtable; - sg->SgCount = nseg; + sg->SgCount = htole32(nseg); for (i = 0; i < nseg; i++) { sg->SgEntry64[i].SgAddress = segs[i].ds_addr; sg->SgEntry64[i].SgByteCount = segs[i].ds_len; + aac_sg_entry64_tole(&sg->SgEntry64[i]); } /* update the FIB size for the s/g count */ fib->Header.Size += nseg*sizeof(struct aac_sg_entry64); @@ -1405,11 +1423,13 @@ aacraid_map_command_sg(void *arg, bus_dma_segment_t *s cm->cm_flags |= AAC_CMD_MAPPED; if (cm->cm_flags & AAC_CMD_WAIT) { + aac_fib_header_tole(&fib->Header); aacraid_sync_command(sc, AAC_MONKER_SYNCFIB, cm->cm_fibphys, 0, 0, 0, NULL, NULL); } else if (sc->flags & AAC_FLAGS_SYNC_MODE) { u_int32_t wait = 0; sc->aac_sync_cm = cm; + aac_fib_header_tole(&fib->Header); aacraid_sync_command(sc, AAC_MONKER_SYNCFIB, cm->cm_fibphys, 0, 0, 0, &wait, NULL); } else { @@ -1788,6 +1808,8 @@ aac_init(struct aac_softc *sc) ip->MaxIoSize = sc->aac_max_sectors << 9; ip->MaxFibSize = sc->aac_max_fib_size; + aac_adapter_init_tole(ip); + /* * Do controller-type-specific initialisation */ @@ -1996,18 +2018,24 @@ aac_check_config(struct aac_softc *sc) ccfg->CTCommand.command = CT_GET_CONFIG_STATUS; ccfg->CTCommand.param[CNT_SIZE] = sizeof(struct aac_cf_status_hdr); + aac_cnt_config_tole(ccfg); rval = aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof (struct aac_cnt_config)); + aac_cnt_config_toh(ccfg); + cf_shdr = (struct aac_cf_status_hdr *)ccfg->CTCommand.data; if (rval == 0 && ccfg->Command == ST_OK && ccfg->CTCommand.param[0] == CT_OK) { - if (cf_shdr->action <= CFACT_PAUSE) { + if (le32toh(cf_shdr->action) <= CFACT_PAUSE) { bzero(ccfg, sizeof (*ccfg) - CT_PACKET_SIZE); ccfg->Command = VM_ContainerConfig; ccfg->CTCommand.command = CT_COMMIT_CONFIG; + aac_cnt_config_tole(ccfg); rval = aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof (struct aac_cnt_config)); + aac_cnt_config_toh(ccfg); + if (rval == 0 && ccfg->Command == ST_OK && ccfg->CTCommand.param[0] == CT_OK) { /* successful completion */ @@ -2087,6 +2115,8 @@ static int aac_sync_fib(struct aac_softc *sc, u_int32_t command, u_int32_t xferstate, struct aac_fib *fib, u_int16_t datasize) { + uint32_t ReceiverFibAddress; + fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, ""); mtx_assert(&sc->aac_io_lock, MA_OWNED); @@ -2105,18 +2135,22 @@ aac_sync_fib(struct aac_softc *sc, u_int32_t command, fib->Header.Size = sizeof(struct aac_fib_header) + datasize; fib->Header.SenderSize = sizeof(struct aac_fib); fib->Header.SenderFibAddress = 0; /* Not needed */ - fib->Header.u.ReceiverFibAddress = sc->aac_common_busaddr + + ReceiverFibAddress = sc->aac_common_busaddr + offsetof(struct aac_common, ac_sync_fib); + fib->Header.u.ReceiverFibAddress = ReceiverFibAddress; + aac_fib_header_tole(&fib->Header); /* * Give the FIB to the controller, wait for a response. */ if (aacraid_sync_command(sc, AAC_MONKER_SYNCFIB, - fib->Header.u.ReceiverFibAddress, 0, 0, 0, NULL, NULL)) { + ReceiverFibAddress, 0, 0, 0, NULL, NULL)) { fwprintf(sc, HBA_FLAGS_DBG_ERROR_B, "IO error"); + aac_fib_header_toh(&fib->Header); return(EIO); } + aac_fib_header_toh(&fib->Header); return (0); } @@ -2407,10 +2441,13 @@ aac_src_send_command(struct aac_softc *sc, struct aac_ pFibX->Handle = cm->cm_fib->Header.Handle; pFibX->HostAddress = cm->cm_fibphys; pFibX->Size = cm->cm_fib->Header.Size; + aac_fib_xporthdr_tole(pFibX); address = cm->cm_fibphys - sizeof(struct aac_fib_xporthdr); high_addr = (u_int32_t)(address >> 32); } + aac_fib_header_tole(&cm->cm_fib->Header); + if (fibsize > 31) fibsize = 31; aac_enqueue_busy(cm); @@ -2468,8 +2505,8 @@ aac_describe_controller(struct aac_softc *sc) supp_info = ((struct aac_supplement_adapter_info *)&fib->data[0]); adapter_type = (char *)supp_info->AdapterTypeText; - sc->aac_feature_bits = supp_info->FeatureBits; - sc->aac_support_opt2 = supp_info->SupportedOptions2; + sc->aac_feature_bits = le32toh(supp_info->FeatureBits); + sc->aac_support_opt2 = le32toh(supp_info->SupportedOptions2); } } device_printf(sc->aac_dev, "%s, aacraid driver %d.%d.%d-%d\n", @@ -2487,6 +2524,7 @@ aac_describe_controller(struct aac_softc *sc) /* save the kernel revision structure for later use */ info = (struct aac_adapter_info *)&fib->data[0]; + aac_adapter_info_toh(info); sc->aac_revision = info->KernelRevision; if (bootverbose) { @@ -2720,6 +2758,18 @@ aac_ioctl_event(struct aac_softc *sc, struct aac_event /* * Send a FIB supplied from userspace + * + * Currently, sending a FIB from userspace in BE hosts is not supported. + * There are several things that need to be considered in order to + * support this, such as: + * - At least the FIB data part from userspace should already be in LE, + * or else the kernel would need to know all FIB types to be able to + * correctly convert it to BE. + * - SG tables are converted to BE by aacraid_map_command_sg(). This + * conversion should be supressed if the FIB comes from userspace. + * - aacraid_wait_command() calls functions that convert the FIB header + * to LE. But if the header is already in LE, the conversion should not + * be performed. */ static int aac_ioctl_sendfib(struct aac_softc *sc, caddr_t ufib) @@ -2961,6 +3011,8 @@ aac_ioctl_send_raw_srb(struct aac_softc *sc, caddr_t a ScsiPortCommandU64 : ScsiPortCommand; cm->cm_sgtable = (struct aac_sg_table *)&srbcmd->sg_map; + aac_srb_tole(srbcmd); + /* send command */ if (transfer_data) { bus_dmamap_load(cm->cm_passthr_dmat, @@ -2978,7 +3030,7 @@ aac_ioctl_send_raw_srb(struct aac_softc *sc, caddr_t a mtx_unlock(&sc->aac_io_lock); /* copy data */ - if (transfer_data && (srbcmd->flags & AAC_SRB_FLAGS_DATA_IN)) { + if (transfer_data && (le32toh(srbcmd->flags) & AAC_SRB_FLAGS_DATA_IN)) { if ((error = copyout(cm->cm_data, (void *)(uintptr_t)srb_sg_address, cm->cm_datalen)) != 0) @@ -2989,6 +3041,7 @@ aac_ioctl_send_raw_srb(struct aac_softc *sc, caddr_t a } /* status */ + aac_srb_response_toh((struct aac_srb_response *)fib->data); error = copyout(fib->data, user_reply, sizeof(struct aac_srb_response)); out: @@ -3039,7 +3092,7 @@ aac_request_aif(struct aac_softc *sc) /* set AIF marker */ fib->Header.Handle = 0x00800000; fib->Header.Command = AifRequest; - ((struct aac_aif_command *)fib->data)->command = AifReqEvent; + ((struct aac_aif_command *)fib->data)->command = htole32(AifReqEvent); aacraid_map_command_sg(cm, NULL, 0, 0); } @@ -3080,9 +3133,9 @@ aac_handle_aif(struct aac_softc *sc, struct aac_fib *f aacraid_print_aif(sc, aif); /* Is it an event that we should care about? */ - switch (aif->command) { + switch (le32toh(aif->command)) { case AifCmdEventNotify: - switch (aif->data.EN.type) { + switch (le32toh(aif->data.EN.type)) { case AifEnAddContainer: case AifEnDeleteContainer: /* @@ -3174,10 +3227,10 @@ aac_handle_aif(struct aac_softc *sc, struct aac_fib *f break; case AifEnEnclosureManagement: - switch (aif->data.EN.data.EEE.eventType) { + switch (le32toh(aif->data.EN.data.EEE.eventType)) { case AIF_EM_DRIVE_INSERTION: case AIF_EM_DRIVE_REMOVAL: - channel = aif->data.EN.data.EEE.unitID; + channel = le32toh(aif->data.EN.data.EEE.unitID); if (sc->cam_rescan_cb != NULL) sc->cam_rescan_cb(sc, ((channel>>24) & 0xF) + 1, @@ -3189,7 +3242,7 @@ aac_handle_aif(struct aac_softc *sc, struct aac_fib *f case AifEnAddJBOD: case AifEnDeleteJBOD: case AifRawDeviceRemove: - channel = aif->data.EN.data.ECE.container; + channel = le32toh(aif->data.EN.data.ECE.container); if (sc->cam_rescan_cb != NULL) sc->cam_rescan_cb(sc, ((channel>>24) & 0xF) + 1, AAC_CAM_TARGET_WILDCARD); @@ -3209,6 +3262,8 @@ aac_handle_aif(struct aac_softc *sc, struct aac_fib *f if (next == 0) sc->aifq_filled = 1; bcopy(fib, &sc->aac_aifq[current], sizeof(struct aac_fib)); + /* Make aifq's FIB header and data LE */ + aac_fib_header_tole(&sc->aac_aifq[current].Header); /* modify AIF contexts */ if (sc->aifq_filled) { for (ctx = sc->fibctx; ctx; ctx = ctx->next) { @@ -3602,6 +3657,7 @@ aac_get_bus_info(struct aac_softc *sc) c_cmd->cmd = CT_GET_SCSI_METHOD; c_cmd->param = 0; + aac_ctcfg_tole(c_cmd); error = aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof(struct aac_ctcfg)); if (error) { @@ -3613,6 +3669,7 @@ aac_get_bus_info(struct aac_softc *sc) } c_resp = (struct aac_ctcfg_resp *)&fib->data[0]; + aac_ctcfg_resp_toh(c_resp); if (c_resp->Status != ST_OK) { device_printf(sc->aac_dev, "VM_ContainerConfig returned 0x%x\n", c_resp->Status); @@ -3632,6 +3689,7 @@ aac_get_bus_info(struct aac_softc *sc) vmi->ObjId = 0; vmi->IoctlCmd = GetBusInfo; + aac_vmioctl_tole(vmi); error = aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof(struct aac_vmi_businf_resp)); if (error) { @@ -3643,6 +3701,7 @@ aac_get_bus_info(struct aac_softc *sc) } vmi_resp = (struct aac_vmi_businf_resp *)&fib->data[0]; + aac_vmi_businf_resp_toh(vmi_resp); if (vmi_resp->Status != ST_OK) { device_printf(sc->aac_dev, "VM_Ioctl returned %d\n", vmi_resp->Status); @@ -3814,6 +3873,7 @@ aac_reset_adapter(struct aac_softc *sc) pc->Min = 1; pc->NoRescan = 1; + aac_pause_command_tole(pc); (void) aac_sync_fib(sc, ContainerCommand, 0, fib, sizeof (struct aac_pause_command)); aac_release_sync_fib(sc); Modified: projects/clang1000-import/sys/dev/aacraid/aacraid_cam.c ============================================================================== --- projects/clang1000-import/sys/dev/aacraid/aacraid_cam.c Fri Mar 6 17:02:14 2020 (r358711) +++ projects/clang1000-import/sys/dev/aacraid/aacraid_cam.c Fri Mar 6 17:11:29 2020 (r358712) @@ -69,6 +69,7 @@ __FBSDID("$FreeBSD$"); #include <sys/aac_ioctl.h> #include <dev/aacraid/aacraid_debug.h> #include <dev/aacraid/aacraid_var.h> +#include <dev/aacraid/aacraid_endian.h> #ifndef CAM_NEW_TRAN_CODE #define CAM_NEW_TRAN_CODE 1 @@ -417,6 +418,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE2) { struct aac_raw_io2 *raw; + /* NOTE: LE conversion handled at aacraid_map_command_sg() */ raw = (struct aac_raw_io2 *)&fib->data[0]; bzero(raw, sizeof(struct aac_raw_io2)); fib->Header.Command = RawIo2; @@ -432,6 +434,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc raw->flags = RIO2_IO_TYPE_WRITE | RIO2_SG_FORMAT_IEEE1212; } else if (sc->flags & AAC_FLAGS_RAW_IO) { struct aac_raw_io *raw; + /* NOTE: LE conversion handled at aacraid_map_command_sg() */ raw = (struct aac_raw_io *)&fib->data[0]; bzero(raw, sizeof(struct aac_raw_io)); fib->Header.Command = RawIo; @@ -452,6 +455,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc br->ContainerId = ccb->ccb_h.target_id; br->BlockNumber = blockno; br->ByteCount = cm->cm_datalen; + aac_blockread_tole(br); fib->Header.Size += sizeof(struct aac_blockread); cm->cm_sgtable = &br->SgMap; } else { @@ -462,6 +466,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc bw->BlockNumber = blockno; bw->ByteCount = cm->cm_datalen; bw->Stable = CUNSTABLE; + aac_blockwrite_tole(bw); fib->Header.Size += sizeof(struct aac_blockwrite); cm->cm_sgtable = &bw->SgMap; } @@ -476,6 +481,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc br->BlockNumber = blockno; br->Pad = 0; br->Flags = 0; + aac_blockread64_tole(br); fib->Header.Size += sizeof(struct aac_blockread64); cm->cm_sgtable = (struct aac_sg_table *)&br->SgMap64; } else { @@ -487,6 +493,7 @@ aac_container_rw_command(struct cam_sim *sim, union cc bw->BlockNumber = blockno; bw->Pad = 0; bw->Flags = 0; + aac_blockwrite64_tole(bw); fib->Header.Size += sizeof(struct aac_blockwrite64); cm->cm_sgtable = (struct aac_sg_table *)&bw->SgMap64; } @@ -656,9 +663,10 @@ aac_container_special_command(struct cam_sim *sim, uni AAC_PM_DRIVERSUP_STOP_UNIT); ccfg->CTCommand.param[1] = co->co_mntobj.ObjectId; ccfg->CTCommand.param[2] = 0; /* 1 - immediate */ + aac_cnt_config_tole(ccfg); if (aacraid_wait_command(cm) != 0 || - *(u_int32_t *)&fib->data[0] != 0) { + le32toh(*(u_int32_t *)&fib->data[0]) != 0) { printf("Power Management: Error start/stop container %d\n", co->co_mntobj.ObjectId); } @@ -930,6 +938,7 @@ aac_passthrough_command(struct cam_sim *sim, union ccb srb->lun = ccb->ccb_h.target_lun; srb->timeout = ccb->ccb_h.timeout; /* XXX */ srb->retry_limit = 0; + aac_srb_tole(srb); cm->cm_complete = aac_cam_complete; cm->cm_ccb = ccb; @@ -1119,7 +1128,7 @@ aac_container_complete(struct aac_command *cm) fwprintf(cm->cm_sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, ""); ccb = cm->cm_ccb; - status = ((u_int32_t *)cm->cm_fib->data)[0]; + status = le32toh(((u_int32_t *)cm->cm_fib->data)[0]); if (cm->cm_flags & AAC_CMD_RESET) { ccb->ccb_h.status = CAM_SCSI_BUS_RESET; @@ -1146,6 +1155,7 @@ aac_cam_complete(struct aac_command *cm) fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, ""); ccb = cm->cm_ccb; srbr = (struct aac_srb_response *)&cm->cm_fib->data[0]; + aac_srb_response_toh(srbr); if (cm->cm_flags & AAC_CMD_FASTRESP) { /* fast response */ @@ -1297,6 +1307,7 @@ aac_cam_reset_bus(struct cam_sim *sim, union ccb *ccb) rbc = (struct aac_resetbus *)&vmi->IoctlBuf[0]; rbc->BusNumber = camsc->inf->BusNumber - 1; + aac_vmioctl_tole(vmi); if (aacraid_wait_command(cm) != 0) { device_printf(sc->aac_dev,"Error sending ResetBus command\n"); Copied: projects/clang1000-import/sys/dev/aacraid/aacraid_endian.c (from r358711, head/sys/dev/aacraid/aacraid_endian.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/clang1000-import/sys/dev/aacraid/aacraid_endian.c Fri Mar 6 17:11:29 2020 (r358712, copy of r358711, head/sys/dev/aacraid/aacraid_endian.c) @@ -0,0 +1,389 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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